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Validation and parameter extraction of a compact equivalent circuit model for an RF CMOS transistor

  • Junaid Ahmed Uqaili
  • , Rabnawaz Sarmad Uqaili
  • , Saleemullah Memon
  • , Kamlesh Kumar Soothar
  • , Kamran Ali Memon*
  • , Muhammad Furqan Haider
  • *Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

This paper presents a compact equivalent circuit model (CECM) for a radio-frequency complementary metal–oxide–semiconductor transistor. The CECM includes an input/output ground-signal-ground pad model, metal interconnections, a MOSFET small-signal substrate model, and a pad coupling model. All the parameters of the entire test structure are extracted. Further, the calculated scattering parameters (S-parameters) and the experimental results are compared under multi-bias conditions. Excellent agreement between the model simulated and measured S-parameters is achieved up to 66 GHz. An error between the simulated and measured S-parameter is calculated under zero bias, and four active biases are within 0.0037 for S11, 0.0017 for S12, 0.006 for S21, and 0.0042 for S22, respectively. The same model is also investigated up to 220 GHz under zero bias and one active bias. The final results in terms of both magnitude and phase show that this model is very well suited for high-frequency applications.

Original languageEnglish
Pages (from-to)1471-1477
Number of pages7
JournalJournal of Computational Electronics
Volume19
Issue number4
DOIs
StatePublished - Dec 2020
Externally publishedYes

Bibliographical note

Publisher Copyright:
© 2020, Springer Science+Business Media, LLC, part of Springer Nature.

Keywords

  • 90-nm CMOS
  • CMOS transistor
  • Compact equivalent circuit model (CECM)
  • Millimeter wave

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Modeling and Simulation
  • Electrical and Electronic Engineering

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