The necessary and sufficient conditions for detecting transistor stuck-open faults in arbitrary multi-level CMOS circuits are shown. A method for representing a two-pattern test for detecting a single stuck-open fault using only one cube is presented. The relationship between the D-algorithm and the conditions for detecting transistor stuck-open faults in CMOS circuits is provided. The application of the proposed approach in robust test generation for transistor stuck-open faults in a number of benchmark circuits is demonstrated. The fault coverage achieved is as good as or better than those reported using existing techniques.