Study of a BIST technique for CMOS active pixel sensors

L. Lizarraga; S. Mir; G. Sicard; A. Bounceur

doi:10.1109/VLSISOC.2006.313255

Study of a BIST technique for CMOS active pixel sensors

L. Lizarraga^*
, S. Mir
, G. Sicard
, A. Bounceur

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

The production test of CMOS image sensors is complicated and expensive as an electrical and an optical test must be executed for the pixel matrix. In this paper we study a Built-In-Self-Test (BIST) technique for the pixels. The technique is based on applying a voltage stimulus at the photosensitive element of the image sensor. The aim of this work is to avoid light stimuli to realise an only electrical test to determine if a pixel is functional or not. This will then reduce test time and test cost. To quantify the quality of this test approach, test metrics such as fault rejection and fault acceptance are estimated. Catastrophic and parametric faults are taken into consideration for the estimation of the test quality.

Original language	English
Title of host publication	IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip
Pages	326-331
Number of pages	6
DOIs	https://doi.org/10.1109/VLSISOC.2006.313255
State	Published - 2006
Externally published	Yes
Event	IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, VLSI-SoIC 2006 - Nice, France Duration: 16 Oct 2006 → 18 Oct 2006

Publication series

Name	IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip

Conference

Conference	IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, VLSI-SoIC 2006
Country/Territory	France
City	Nice
Period	16/10/06 → 18/10/06

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/VLSISOC.2006.313255

Cite this

Lizarraga, L., Mir, S., Sicard, G., & Bounceur, A. (2006). Study of a BIST technique for CMOS active pixel sensors. In IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip (pp. 326-331). Article 4107651 (IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip). https://doi.org/10.1109/VLSISOC.2006.313255

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title = "Study of a BIST technique for CMOS active pixel sensors",

abstract = "The production test of CMOS image sensors is complicated and expensive as an electrical and an optical test must be executed for the pixel matrix. In this paper we study a Built-In-Self-Test (BIST) technique for the pixels. The technique is based on applying a voltage stimulus at the photosensitive element of the image sensor. The aim of this work is to avoid light stimuli to realise an only electrical test to determine if a pixel is functional or not. This will then reduce test time and test cost. To quantify the quality of this test approach, test metrics such as fault rejection and fault acceptance are estimated. Catastrophic and parametric faults are taken into consideration for the estimation of the test quality.",

author = "L. Lizarraga and S. Mir and G. Sicard and A. Bounceur",

year = "2006",

doi = "10.1109/VLSISOC.2006.313255",

language = "English",

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series = "IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip",

pages = "326--331",

booktitle = "IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip",

note = "IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, VLSI-SoIC 2006 ; Conference date: 16-10-2006 Through 18-10-2006",

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Lizarraga, L, Mir, S, Sicard, G & Bounceur, A 2006, Study of a BIST technique for CMOS active pixel sensors. in IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip., 4107651, IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, pp. 326-331, IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, VLSI-SoIC 2006, Nice, France, 16/10/06. https://doi.org/10.1109/VLSISOC.2006.313255

Study of a BIST technique for CMOS active pixel sensors. / Lizarraga, L.; Mir, S.; Sicard, G. et al.
IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip. 2006. p. 326-331 4107651 (IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - The production test of CMOS image sensors is complicated and expensive as an electrical and an optical test must be executed for the pixel matrix. In this paper we study a Built-In-Self-Test (BIST) technique for the pixels. The technique is based on applying a voltage stimulus at the photosensitive element of the image sensor. The aim of this work is to avoid light stimuli to realise an only electrical test to determine if a pixel is functional or not. This will then reduce test time and test cost. To quantify the quality of this test approach, test metrics such as fault rejection and fault acceptance are estimated. Catastrophic and parametric faults are taken into consideration for the estimation of the test quality.

AB - The production test of CMOS image sensors is complicated and expensive as an electrical and an optical test must be executed for the pixel matrix. In this paper we study a Built-In-Self-Test (BIST) technique for the pixels. The technique is based on applying a voltage stimulus at the photosensitive element of the image sensor. The aim of this work is to avoid light stimuli to realise an only electrical test to determine if a pixel is functional or not. This will then reduce test time and test cost. To quantify the quality of this test approach, test metrics such as fault rejection and fault acceptance are estimated. Catastrophic and parametric faults are taken into consideration for the estimation of the test quality.

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Lizarraga L, Mir S, Sicard G, Bounceur A. Study of a BIST technique for CMOS active pixel sensors. In IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip. 2006. p. 326-331. 4107651. (IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip). doi: 10.1109/VLSISOC.2006.313255

Study of a BIST technique for CMOS active pixel sensors

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