State machine synthesis with weinberger arrays

Research output: Contribution to journalArticlepeer-review

Abstract

The development of a digital circuit synthesis program is described. The program accepts the transition table or a state machine and returns equations for an implementation that assumes a sum-of-product next-state and output functions. From the equations for the next-state and output functions, nMOS VLSI layout for a Weinberger array is generated. D flip-flops are assumed for memory elements. Using this tool, tedious manual calculations can be avoided and layouts can be generated automatically from state table descriptions.

Original languageEnglish
Pages (from-to)1-12
Number of pages12
JournalInternational Journal of Electronics
Volume71
Issue number1
DOIs
StatePublished - Jul 1991

Bibliographical note

Funding Information:
The authors acknowledge support from the King Fahd University of Petroleum and Minerals and the University of Victoria, Canada.

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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