Skip to main navigation Skip to search Skip to main content

Speed optimized array architecture for flash EEPROMs

  • A. A.M. Amin*
    • *Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Fingerprint

Dive into the research topics of 'Speed optimized array architecture for flash EEPROMs'. Together they form a unique fingerprint.
Sort by

Engineering

Computer Science