Abstract
A hybrid heuristic for multiobjective VLSI cell placement is presented, which draws from the memory concept of Tabu search (TS) and the goodness feature of Simulated Evolution (SimE). Experimental results using ISCAS-89 benchmark circuits illustrate improvement in quality as compared to our best canonical TS implementation.
| Original language | English |
|---|---|
| Pages (from-to) | 364-365 |
| Number of pages | 2 |
| Journal | Electronics Letters |
| Volume | 42 |
| Issue number | 6 |
| DOIs | |
| State | Published - 16 Mar 2006 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering
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