Abstract
In this paper a new binary differential phase encoding technique is suggested. The suggested approach, symmetric differential phase shift keying (SDPSK), is designed to alleviate the symbol synchronization difficulties which optimum DPSK may encounter while maintaining the same probability of error in the absence of time jitter. Also an economical and compact fast Fourier transform (FFT)-based realization of the block demodulators for both optimum DPSK and SDPSK encoded signals is suggested. Theoretical developments along with simulation results are provided.
Original language | English |
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Title of host publication | IEEE International Conference on Communications |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 1278-1284 |
Number of pages | 7 |
ISBN (Electronic) | 078035284X |
DOIs | |
State | Published - 1999 |
Publication series
Name | IEEE International Conference on Communications |
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Volume | 2 |
ISSN (Print) | 1550-3607 |
Bibliographical note
Publisher Copyright:© 1999 IEEE.
ASJC Scopus subject areas
- Computer Networks and Communications
- Electrical and Electronic Engineering