Realizing the giant seebeck coefficient and electrical conductivity in SnTe thin films by grain engineering

In this work, we have modulated the film growth parameter (post growth annealing) of SnTe-based thin films to enhance the charge carrier transport by controlling the morphology and microstructure. The samples under investigation were prepared by a vacuum tube furnace on a glass substrate using following growth conditions; growth temperature 700 °C, pressure in the tube 180 mTorr, source to substrate distance 7 cm. Grain engineering was performed by annealing the samples at different temperatures (200–500 °C) which was used as a powerful tool to enhance the mobility of charge carriers (7–13 cm²/V-Sec). SEM images demonstrated that a representative sample annealed at 300 °C has a layered structure, therefore the carriers in this sample possessed the highest value of mobility. This encouraging value of carrier mobility resulted in the enhancement of the Seebeck coefficient (7600 μV/K) and electrical conductivity (5S/cm) simultaneously. XRD and Raman spectroscopy measurements were also performed to crystal structure and vibrational modes of annealed SnTe thin films. In conclusion, it is reported that the annealing temperature of 300 °C is supposed to be the optimal value for required grain engineering in order to realize the highest value of the Seebeck coefficient and electrical conductivity.