Parallel computing platform for evaluating LDPC codes performance

  • Esa Alghonaim*
  • , Aiman El-Maleh
  • , Adrian Al-Andalusi
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

This paper presents a novel approach for the design and implementation of a simulation platform for evaluating LDPC codes performance. The existing LDPC code simulation tools consume very long time in evaluating the performance of a specific code design. This is due to the intensive number of required computations. This problem is overcome by developing a parallel protocol to distribute the computations among processing nodes in a TCP/IP network. As indicated by experimental results, the proposed simulation platform is scalable with the number of processing nodes. Another practical advantage of the proposed system is that it does not need dedicated processors to run it; rather, it can utilize idle times of processing nodes in a network and work transparent to a node user. Furthermore, network daemons are used to utilize network nodes even if they are in the log-off state.

Original languageEnglish
Title of host publicationICSPC 2007 Proceedings - 2007 IEEE International Conference on Signal Processing and Communications
Pages157-160
Number of pages4
DOIs
StatePublished - 2007

Publication series

NameICSPC 2007 Proceedings - 2007 IEEE International Conference on Signal Processing and Communications

Keywords

  • Iterative decoder
  • LDPC codes
  • Parallel processing
  • SPA
  • Simulation

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Signal Processing
  • Communication

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