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Open-Circuit Fault-Tolerant High-Gain Multilevel Inverter Topology With Minimum of 2/3 Level in Postfault Condition

  • Marif Daula Siddique*
  • , Mehdi Seyedmahmoudian
  • , Saad Mekhilef
  • , Alex Stojcevski
  • *Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

12 Scopus citations

Abstract

The reliability of the power converter (PC) must be considered a very important aspect of the design of new topologies. Multilevel inverters have a higher number of devices, which reduces the reliability of such a converter. In this letter, a new single-source switched-capacitor-based high-gain converter has been proposed. The fault analysis of the proposed topology has been carried out, and based on the analysis, a fault-tolerant version of the proposed topology has been proposed. A detailed power quality analysis has been carried out for different fault cases. Experimental results have been used to validate the proposed topology.

Original languageEnglish
Pages (from-to)12013-12017
Number of pages5
JournalIEEE Transactions on Power Electronics
Volume39
Issue number10
DOIs
StatePublished - 2024

Bibliographical note

Publisher Copyright:
© 2024 IEEE.

Keywords

  • Boost inverter
  • fault-tolerant (FT) topology
  • multilevel inverter (MLI)
  • power converter (PC)
  • reliability

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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