Abstract
Four-valued, one-variable multivalued logic (MVL) functions are synthesized using current-mode CMOS logic (CMCL) circuits. Use is made of the fact that in CMCL, addition of logic values (represented using discrete current values) can be performed at no cost and that negative logic values are readily available by reversing the direction of current flow. A synthesis procedure that is based on the cost-table approach is proposed. The procedure results in less expensive (in terms of the number of transistors needed) realizations than those achieved using existing techniques.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of The International Symposium on Multiple-Valued Logic |
| Publisher | Publ by IEEE |
| Pages | 221-228 |
| Number of pages | 8 |
| ISBN (Print) | 0818626801 |
| State | Published - May 1992 |
Publication series
| Name | Proceedings of The International Symposium on Multiple-Valued Logic |
|---|---|
| ISSN (Print) | 0195-623X |
ASJC Scopus subject areas
- General Computer Science
- General Mathematics
Fingerprint
Dive into the research topics of 'On the synthesis of MVL functions for current-mode CMOS circuits implementation'. Together they form a unique fingerprint.Cite this
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver