Four-valued, one-variable multivalued logic (MVL) functions are synthesized using current-mode CMOS logic (CMCL) circuits. Use is made of the fact that in CMCL, addition of logic values (represented using discrete current values) can be performed at no cost and that negative logic values are readily available by reversing the direction of current flow. A synthesis procedure that is based on the cost-table approach is proposed. The procedure results in less expensive (in terms of the number of transistors needed) realizations than those achieved using existing techniques.