On methods for direct memory access without cycle stealing

In hard real-time environments, it is necessary to determine in advance the run-times of tasks and to guarantee very short reaction times. Hence, the degradation of the processor speed by peripheral devices directly accessing the system memory by stealing memory cycles becomes a problem. After mentioning a known method for performing DMA without cycle stealing, another one is described based on the dynamic subdivision of the system bus. Then, the close relationship between the refreshing of dynamic RAM ICs and DMA is outlined, Finally, the design of DRAMs possessing a second, serial memory port, to implement CPU transparent DMA facilities, is given.