Abstract
A novel BiCMOS full-swing circuit technique with superior performance over CMOS down to 1.5 V is proposed. A conventional noncomplementary BiCMOS process is used. The proposed pull-up configuration is based on a capacitively coupled feedback circuit. Several pull-down options were examined and compared, and the results are reported. Several cells were implemented using the novel circuit technique; simple buffers logic gates, and master-slave latches. Their performance, regarding speed, area, and power, was compared to that of CMOS for different technologies and supply voltages. Both device and circuit simulations were used. A design procedure for the feedback circuit and the effects of scaling on that procedure were studied and reported.
| Original language | English |
|---|---|
| Pages (from-to) | 86-94 |
| Number of pages | 9 |
| Journal | IEEE Journal of Solid-State Circuits |
| Volume | 29 |
| Issue number | 2 |
| DOIs | |
| State | Published - Feb 1994 |
| Externally published | Yes |
Bibliographical note
Funding Information:Manuscript received December 4, 1992; revised September 27, 1993. This work was supported in part by research grants from NSERC, ITRC, and MICRONET. M. S. Elrabaa and M. I. Elmasry are with the VLSI Research Group, Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Canada, N2L 3G1. M. S. Obrecht is with the VLSI Research Group, Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Canada, N2L 3G1, on leave from the Institute of Pure and Applied Mechanics. Novosibirsk, Russia. IEEE Log Number 9214770.
ASJC Scopus subject areas
- Electrical and Electronic Engineering