TY - GEN
T1 - Multivariate statistical techniques for analog parametric test metrics estimation
AU - Huang, Ke
AU - Stratigopoulos, Haralampos G.
AU - Abdallah, Louay
AU - Mir, Salvador
AU - Bounceur, Ahcene
PY - 2013
Y1 - 2013
N2 - The high cost for testing the analog blocks of a modern chip has sparked research efforts to replace the standard tests with less costly alternative tests. However, test engineers are rather reluctant to adopt alternative tests unless they are evaluated thoroughly before moving to production and they are proven to maintain test quality. This paper gives a comprehensive overview of statistical techniques based on density estimation for evaluating analog parametric test metrics during the test development phase. A large-scale simulation study is carried out for the first time with the aim to demonstrate these techniques in action.
AB - The high cost for testing the analog blocks of a modern chip has sparked research efforts to replace the standard tests with less costly alternative tests. However, test engineers are rather reluctant to adopt alternative tests unless they are evaluated thoroughly before moving to production and they are proven to maintain test quality. This paper gives a comprehensive overview of statistical techniques based on density estimation for evaluating analog parametric test metrics during the test development phase. A large-scale simulation study is carried out for the first time with the aim to demonstrate these techniques in action.
UR - https://www.scopus.com/pages/publications/84881139622
U2 - 10.1109/DTIS.2013.6527768
DO - 10.1109/DTIS.2013.6527768
M3 - Conference contribution
AN - SCOPUS:84881139622
SN - 9781467360388
T3 - Proceedings of the 2013 8th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2013
SP - 6
EP - 11
BT - Proceedings of the 2013 8th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2013
T2 - 2013 8th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2013
Y2 - 26 March 2013 through 28 March 2013
ER -