The increased capacity of multi-level cells (MLC) and triple-level cells (TLC) in emerging non-volatile memory (NVM) technologies comes at the cost of higher cell write energies and lower cell endurance. In this article, we describe MFNW, a Flip-N-Write encoding that effectively reduces the write energy and improves the endurance of MLC NVMs. Two MFNW modes are analyzed: cell Hamming distance mode and energy Hamming distance mode. We derive an approximate model that accurately predicts the average number of cell writes that is proportional to the energy consumption, enabling word length optimization to maximize energy reduction subject to memory space overhead constraints. In comparison to state-of-the-art MLC NVM encodings, our simulation results indicate that MFNW achieves up to 7%-39% saving for 1.56%-50% NVM space overhead. Extra energy saving (up to 19%-47%) can be achieved for the same NVM space overhead using our proposed variations of MFNW, i.e., MFNW2 and MFNW3. For TLC NVMs, we propose TFNW that can achieve up to 53% energy saving in comparison to state-of-the-art TLC NVM encodings. Endurance simulations indicate that MFNW (TFNW) is capable of extending MLC (TLC) NVM life by up to 100% (87%).
|Journal||ACM Journal on Emerging Technologies in Computing Systems|
|State||Published - Jul 2018|
Bibliographical noteFunding Information:
This research was supported by King Fahd University of Petroleum and Minerals and NSF Award CCF-1217738.
This research was supported by King Fahd University of Petroleum and Minerals and NSF Award CCF-1217738. Authors’ addresses: A. Alsuwaiyan, COE Department, KFUPM 5065, DHAHRAN 31261, SAUDI ARABIA; email: firstname.lastname@example.org; K. Mohanram, ECE Department, University of Pittsburgh, 1238 Benedum Hall, Pittsburgh, PA 15261; email: email@example.com. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from firstname.lastname@example.org. © 2018 ACM 1550-4832/2018/07-ART28 $15.00 https://doi.org/10.1145/3154841
© 2018 ACM.
- Low power
- Multi-level cell (MLC)
- Non-volatile memories
- Triple-level cell (TLC)
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering