Low-power RRAM Device based 1T1R Array Design with CNTFET as Access Device

Furqan Zahoor; Tun Zainal Azni Zulkifli; Farooq Ahmad Khanday; Aabid Amin Fida

doi:10.1109/SCORED.2019.8896306

Low-power RRAM Device based 1T1R Array Design with CNTFET as Access Device

Furqan Zahoor, Tun Zainal Azni Zulkifli, Farooq Ahmad Khanday, Aabid Amin Fida

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

15 Scopus citations

Abstract

A SPICE model of metal oxide based resistive random access memory (RRAM) devices is demonstrated in this paper having bipolar switching characteristics and utilizing carbon nanotube field effect transistor (CNTFET) in a 1T1R configuration. The growth and the dissolution of the conductive filament in the oxide layer is the basis of the switching mechanism in this model. The model has been implemented in HSPICE simulation software for circuit level analysis. Initially, the simulation of memory cell with CNTFETs is carried out and later on 3∗3 memory matrix is analyzed. The proposed design shows a reduction in power consumption as compared to RRAM cell utilizing metal oxide semiconductor field effect transistor (MOSFET) in a 1T1R configuration.

Original language	English
Title of host publication	2019 IEEE Student Conference on Research and Development, SCOReD 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	280-283
Number of pages	4
ISBN (Electronic)	9781728126135
DOIs	https://doi.org/10.1109/SCORED.2019.8896306
State	Published - Oct 2019
Externally published	Yes

Publication series

Name	2019 IEEE Student Conference on Research and Development, SCOReD 2019

Bibliographical note

Publisher Copyright:
© 2019 IEEE.

Keywords

Power dissipation
RRAM
emerging memory technology
memory cell
non-volatile memory

ASJC Scopus subject areas

Computer Networks and Communications
Computer Science Applications
Aerospace Engineering
Automotive Engineering
Mechanical Engineering
Computational Mathematics
Safety, Risk, Reliability and Quality
Instrumentation

Access to Document

10.1109/SCORED.2019.8896306

Cite this

Zahoor, F., Zulkifli, T. Z. A., Khanday, F. A., & Fida, A. A. (2019). Low-power RRAM Device based 1T1R Array Design with CNTFET as Access Device. In 2019 IEEE Student Conference on Research and Development, SCOReD 2019 (pp. 280-283). Article 8896306 (2019 IEEE Student Conference on Research and Development, SCOReD 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SCORED.2019.8896306

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title = "Low-power RRAM Device based 1T1R Array Design with CNTFET as Access Device",

abstract = "A SPICE model of metal oxide based resistive random access memory (RRAM) devices is demonstrated in this paper having bipolar switching characteristics and utilizing carbon nanotube field effect transistor (CNTFET) in a 1T1R configuration. The growth and the dissolution of the conductive filament in the oxide layer is the basis of the switching mechanism in this model. The model has been implemented in HSPICE simulation software for circuit level analysis. Initially, the simulation of memory cell with CNTFETs is carried out and later on 3∗3 memory matrix is analyzed. The proposed design shows a reduction in power consumption as compared to RRAM cell utilizing metal oxide semiconductor field effect transistor (MOSFET) in a 1T1R configuration.",

keywords = "Power dissipation, RRAM, emerging memory technology, memory cell, non-volatile memory",

author = "Furqan Zahoor and Zulkifli, \{Tun Zainal Azni\} and Khanday, \{Farooq Ahmad\} and Fida, \{Aabid Amin\}",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.",

year = "2019",

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doi = "10.1109/SCORED.2019.8896306",

language = "English",

series = "2019 IEEE Student Conference on Research and Development, SCOReD 2019",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Zahoor, F, Zulkifli, TZA, Khanday, FA & Fida, AA 2019, Low-power RRAM Device based 1T1R Array Design with CNTFET as Access Device. in 2019 IEEE Student Conference on Research and Development, SCOReD 2019., 8896306, 2019 IEEE Student Conference on Research and Development, SCOReD 2019, Institute of Electrical and Electronics Engineers Inc., pp. 280-283. https://doi.org/10.1109/SCORED.2019.8896306

Low-power RRAM Device based 1T1R Array Design with CNTFET as Access Device. / Zahoor, Furqan; Zulkifli, Tun Zainal Azni; Khanday, Farooq Ahmad et al.
2019 IEEE Student Conference on Research and Development, SCOReD 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 280-283 8896306 (2019 IEEE Student Conference on Research and Development, SCOReD 2019).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - A SPICE model of metal oxide based resistive random access memory (RRAM) devices is demonstrated in this paper having bipolar switching characteristics and utilizing carbon nanotube field effect transistor (CNTFET) in a 1T1R configuration. The growth and the dissolution of the conductive filament in the oxide layer is the basis of the switching mechanism in this model. The model has been implemented in HSPICE simulation software for circuit level analysis. Initially, the simulation of memory cell with CNTFETs is carried out and later on 3∗3 memory matrix is analyzed. The proposed design shows a reduction in power consumption as compared to RRAM cell utilizing metal oxide semiconductor field effect transistor (MOSFET) in a 1T1R configuration.

AB - A SPICE model of metal oxide based resistive random access memory (RRAM) devices is demonstrated in this paper having bipolar switching characteristics and utilizing carbon nanotube field effect transistor (CNTFET) in a 1T1R configuration. The growth and the dissolution of the conductive filament in the oxide layer is the basis of the switching mechanism in this model. The model has been implemented in HSPICE simulation software for circuit level analysis. Initially, the simulation of memory cell with CNTFETs is carried out and later on 3∗3 memory matrix is analyzed. The proposed design shows a reduction in power consumption as compared to RRAM cell utilizing metal oxide semiconductor field effect transistor (MOSFET) in a 1T1R configuration.

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KW - emerging memory technology

KW - memory cell

KW - non-volatile memory

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Zahoor F, Zulkifli TZA, Khanday FA, Fida AA. Low-power RRAM Device based 1T1R Array Design with CNTFET as Access Device. In 2019 IEEE Student Conference on Research and Development, SCOReD 2019. Institute of Electrical and Electronics Engineers Inc. 2019. p. 280-283. 8896306. (2019 IEEE Student Conference on Research and Development, SCOReD 2019). doi: 10.1109/SCORED.2019.8896306

Low-power RRAM Device based 1T1R Array Design with CNTFET as Access Device

Abstract

Publication series

Bibliographical note

Keywords

ASJC Scopus subject areas

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Cite this