Integrated Architecture for Neural Networks and Security Primitives using RRAM Crossbar

Simranjeet Singh*, Furqan Zahoor, Gokulnath Rajendran, Vikas Rana, Sachin Patkar, Anupam Chattopadhyay, Farhad Merchant

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper proposes an architecture that integrates neural networks (NNs) and hardware security modules using a single resistive random access memory (RRAM) crossbar. The proposed architecture enables using a single crossbar to implement NN, true random number generator (TRNG), and physical unclonable function (PUF) applications while exploiting the multi-state storage characteristic of the RRAM crossbar for the vector-matrix multiplication operation required for the implementation of NN. The TRNG is implemented by utilizing the crossbar's variation in device switching thresholds to generate random bits. The PUF is implemented using the same crossbar initialized as an entropy source for the TRNG. Additionally, the weights locking concept is introduced to enhance the security of NNs by preventing unauthorized access to the NN weights. The proposed architecture provides flexibility to configure the RRAM device in multiple modes to suit different applications. It shows promise in achieving a more efficient and compact design for the hardware implementation of NNs and security primitives.

Original languageEnglish
Title of host publication21st IEEE Interregional NEWCAS Conference, NEWCAS 2023 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350300246
DOIs
StatePublished - 2023
Externally publishedYes
Event21st IEEE Interregional NEWCAS Conference, NEWCAS 2023 - Edinburgh, United Kingdom
Duration: 26 Jun 202328 Jun 2023

Publication series

Name21st IEEE Interregional NEWCAS Conference, NEWCAS 2023 - Proceedings

Conference

Conference21st IEEE Interregional NEWCAS Conference, NEWCAS 2023
Country/TerritoryUnited Kingdom
CityEdinburgh
Period26/06/2328/06/23

Bibliographical note

Publisher Copyright:
© 2023 IEEE.

Keywords

  • Hardware Security
  • Memristors
  • NN
  • PUF
  • RRAM
  • TRNG

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality
  • Modeling and Simulation
  • Instrumentation

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