Abstract
In this paper a bias eliminated system identification method for an output error model is proposed. The system under consideration is a time delayed system. The identification is done via a discrete time (DT) model with non-integer time delay. In a Discrete time, system, the time delay is a non-integer multiple of the sampling period. The paper proposes a new formulation of discretization, a Single-input and a single-output system (SISO) is modified to two-inputs and single-output system (TISO): First transfer function (T. F) represents the system dynamics and the other is due to the influence of the time delay. Using this interpretation, we proceed with the estimation of the parameters. we propose the identification using three different techniques, Least Square, Regularized Least Square and instrumental variable method and verify its effectiveness through numerical examples.
| Original language | English |
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| Title of host publication | Proceedings of the 17th International Multi-Conference on Systems, Signals and Devices, SSD 2020 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 97-102 |
| Number of pages | 6 |
| ISBN (Electronic) | 9781728110806 |
| DOIs | |
| State | Published - 20 Jul 2020 |
Publication series
| Name | Proceedings of the 17th International Multi-Conference on Systems, Signals and Devices, SSD 2020 |
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Bibliographical note
Publisher Copyright:© 2020 IEEE.
Keywords
- Discretization
- Instrumental Variable Method
- System identification
- Time-delay system
ASJC Scopus subject areas
- Artificial Intelligence
- Computer Networks and Communications
- Signal Processing
- Electrical and Electronic Engineering
- Instrumentation