High performance elliptic curve point operations with pipelined GF(2 m) field multiplier

Turki F. Al-Somani; Alaaeldin Amin

doi:10.1109/AICCSA.2008.4493520

High performance elliptic curve point operations with pipelined GF(2 ^m) field multiplier

Turki F. Al-Somani
, Alaaeldin Amin

King Fahd University of Petroleum & Minerals

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

This paper studies the effect of high performance pipelined GF(2 ²⁵⁶) bit-serial multiplier on elliptic curve point operations. A 3-stage pipelined version of the Massy-Omura GF(2^m) normal basis multiplier for 160 ≤ m ≤ 256 was studied in terms of area overhead and throughput improvement. Simple gate area and delay models were used to estimate the throughput of the pipelined and the non-pipelined multipliers. The proposed pipelined architecture has been shown to have a significant improvement in throughput allowing a single 3-stage pipelined multiplier to have higher throughput than an architecture employing three parallel non-pipelined multipliers. The AT² performance metric has shown an even more significant improvement.

Original language	English
Title of host publication	AICCSA 08 - 6th IEEE/ACS International Conference on Computer Systems and Applications
Pages	82-88
Number of pages	7
DOIs	https://doi.org/10.1109/AICCSA.2008.4493520
State	Published - 2008

Publication series

Name	AICCSA 08 - 6th IEEE/ACS International Conference on Computer Systems and Applications

ASJC Scopus subject areas

Artificial Intelligence
Computer Science Applications
Control and Systems Engineering

Access to Document

10.1109/AICCSA.2008.4493520

Cite this

Al-Somani, T. F., & Amin, A. (2008). High performance elliptic curve point operations with pipelined GF(2 ^m) field multiplier. In AICCSA 08 - 6th IEEE/ACS International Conference on Computer Systems and Applications (pp. 82-88). Article 4493520 (AICCSA 08 - 6th IEEE/ACS International Conference on Computer Systems and Applications). https://doi.org/10.1109/AICCSA.2008.4493520

@inproceedings{65bd3beec4ca403eb4f5dbdf4d86ca12,

title = "High performance elliptic curve point operations with pipelined GF(2 m) field multiplier",

abstract = "This paper studies the effect of high performance pipelined GF(2 256) bit-serial multiplier on elliptic curve point operations. A 3-stage pipelined version of the Massy-Omura GF(2m) normal basis multiplier for 160 ≤ m ≤ 256 was studied in terms of area overhead and throughput improvement. Simple gate area and delay models were used to estimate the throughput of the pipelined and the non-pipelined multipliers. The proposed pipelined architecture has been shown to have a significant improvement in throughput allowing a single 3-stage pipelined multiplier to have higher throughput than an architecture employing three parallel non-pipelined multipliers. The AT2 performance metric has shown an even more significant improvement.",

author = "Al-Somani, \{Turki F.\} and Alaaeldin Amin",

year = "2008",

doi = "10.1109/AICCSA.2008.4493520",

language = "English",

isbn = "9781424419685",

series = "AICCSA 08 - 6th IEEE/ACS International Conference on Computer Systems and Applications",

pages = "82--88",

booktitle = "AICCSA 08 - 6th IEEE/ACS International Conference on Computer Systems and Applications",

}

High performance elliptic curve point operations with pipelined GF(2 ^m) field multiplier. / Al-Somani, Turki F.; Amin, Alaaeldin.
AICCSA 08 - 6th IEEE/ACS International Conference on Computer Systems and Applications. 2008. p. 82-88 4493520 (AICCSA 08 - 6th IEEE/ACS International Conference on Computer Systems and Applications).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - High performance elliptic curve point operations with pipelined GF(2 m) field multiplier

AU - Al-Somani, Turki F.

AU - Amin, Alaaeldin

PY - 2008

Y1 - 2008

N2 - This paper studies the effect of high performance pipelined GF(2 256) bit-serial multiplier on elliptic curve point operations. A 3-stage pipelined version of the Massy-Omura GF(2m) normal basis multiplier for 160 ≤ m ≤ 256 was studied in terms of area overhead and throughput improvement. Simple gate area and delay models were used to estimate the throughput of the pipelined and the non-pipelined multipliers. The proposed pipelined architecture has been shown to have a significant improvement in throughput allowing a single 3-stage pipelined multiplier to have higher throughput than an architecture employing three parallel non-pipelined multipliers. The AT2 performance metric has shown an even more significant improvement.

AB - This paper studies the effect of high performance pipelined GF(2 256) bit-serial multiplier on elliptic curve point operations. A 3-stage pipelined version of the Massy-Omura GF(2m) normal basis multiplier for 160 ≤ m ≤ 256 was studied in terms of area overhead and throughput improvement. Simple gate area and delay models were used to estimate the throughput of the pipelined and the non-pipelined multipliers. The proposed pipelined architecture has been shown to have a significant improvement in throughput allowing a single 3-stage pipelined multiplier to have higher throughput than an architecture employing three parallel non-pipelined multipliers. The AT2 performance metric has shown an even more significant improvement.

UR - https://www.scopus.com/pages/publications/50049113069

U2 - 10.1109/AICCSA.2008.4493520

DO - 10.1109/AICCSA.2008.4493520

M3 - Conference contribution

AN - SCOPUS:50049113069

SN - 9781424419685

T3 - AICCSA 08 - 6th IEEE/ACS International Conference on Computer Systems and Applications

SP - 82

EP - 88

BT - AICCSA 08 - 6th IEEE/ACS International Conference on Computer Systems and Applications

ER -