Abstract
This paper presents an integrated system which accepts as input a purely behavioral description expressed in a subset of the C language and transforms it into RTL description in the AHPL language. The novelty of this work is the introduction of a new stack intermediate form, and the use of hardware-specific optimization during the scheduling phase. This idea has produced sizable decrease in the number of control steps compared to other reported techniques.
| Original language | English |
|---|---|
| Pages (from-to) | 259-273 |
| Number of pages | 15 |
| Journal | Computer Systems Science and Engineering |
| Volume | 11 |
| Issue number | 5 |
| State | Published - Sep 1996 |
Keywords
- Allocation
- Compilers
- High-level synthesis
- Layouts
- Optimization
- RTL
- Scheduling
- Simulation
- VLSI
ASJC Scopus subject areas
- Control and Systems Engineering
- Theoretical Computer Science
- General Computer Science