Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG

Gokulnath Rajendran; Furqan Zahoor; Sidhaant Sachin Thakker; Simranjeet Singh; Farhad Merchant; Vikas Rana; Anupam Chattopadhyay

doi:10.1109/VLSID60093.2024.00099

Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG

Gokulnath Rajendran^*
, Furqan Zahoor
, Sidhaant Sachin Thakker
, Simranjeet Singh
, Farhad Merchant
, Vikas Rana
, Anupam Chattopadhyay

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

8 Scopus citations

Abstract

Physical Unclonable Functions (PUF) and Random Number Generators (RNG) are two fundamental security components with applications in various tasks of a security protocol, such as key establishment, identity management, and authentication. In recent times, researchers have proposed various PUF and RNG constructions using RRAMs, demonstrating excellent properties, low energy consumption, and resistance to modelling attacks. Underlying these PUF and RNG constructions, the source of entropy remains the same, and therefore, it is natural to design a unified RRAM-based architecture to function both as a PUF and an RNG. This is accomplished in the current paper. We propose a unified Parity-RRAM PUF (PR-PUF) and RNG construction and validate it for well-known PUF characteristics and RNG randomness properties with the NIST test suite SP 800-22. We present detailed design analysis and simulation-based studies to substantiate our ideas.

Original language	English
Title of host publication	Proceedings - 37th International Conference on VLSI Design, VLSID 2024 - held concurrently with 23rd International Conference on Embedded Systems, ES 2024
Publisher	IEEE Computer Society
Pages	560-564
Number of pages	5
ISBN (Electronic)	9798350384406
DOIs	https://doi.org/10.1109/VLSID60093.2024.00099
State	Published - 2024
Externally published	Yes
Event	37th International Conference on VLSI Design, VLSID 2024 - Kolkata, West Bengal, India Duration: 6 Jan 2024 → 10 Jan 2024

Publication series

Name	Proceedings of the IEEE International Conference on VLSI Design
ISSN (Print)	1063-9667

Conference

Conference	37th International Conference on VLSI Design, VLSID 2024
Country/Territory	India
City	Kolkata, West Bengal
Period	6/01/24 → 10/01/24

Bibliographical note

Publisher Copyright:
© 2024 IEEE.

Keywords

PUF
RNG
RRAM
Security

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/VLSID60093.2024.00099

Cite this

Rajendran, G., Zahoor, F., Thakker, S. S., Singh, S., Merchant, F., Rana, V., & Chattopadhyay, A. (2024). Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG. In Proceedings - 37th International Conference on VLSI Design, VLSID 2024 - held concurrently with 23rd International Conference on Embedded Systems, ES 2024 (pp. 560-564). (Proceedings of the IEEE International Conference on VLSI Design). IEEE Computer Society. https://doi.org/10.1109/VLSID60093.2024.00099

Rajendran, Gokulnath ; Zahoor, Furqan ; Thakker, Sidhaant Sachin et al. / Harnessing Entropy : RRAM Crossbar-based Unified PUF and RNG. Proceedings - 37th International Conference on VLSI Design, VLSID 2024 - held concurrently with 23rd International Conference on Embedded Systems, ES 2024. IEEE Computer Society, 2024. pp. 560-564 (Proceedings of the IEEE International Conference on VLSI Design).

@inproceedings{e5d09ee7f7a44f80a6304ec86496e769,

title = "Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG",

abstract = "Physical Unclonable Functions (PUF) and Random Number Generators (RNG) are two fundamental security components with applications in various tasks of a security protocol, such as key establishment, identity management, and authentication. In recent times, researchers have proposed various PUF and RNG constructions using RRAMs, demonstrating excellent properties, low energy consumption, and resistance to modelling attacks. Underlying these PUF and RNG constructions, the source of entropy remains the same, and therefore, it is natural to design a unified RRAM-based architecture to function both as a PUF and an RNG. This is accomplished in the current paper. We propose a unified Parity-RRAM PUF (PR-PUF) and RNG construction and validate it for well-known PUF characteristics and RNG randomness properties with the NIST test suite SP 800-22. We present detailed design analysis and simulation-based studies to substantiate our ideas.",

keywords = "PUF, RNG, RRAM, Security",

author = "Gokulnath Rajendran and Furqan Zahoor and Thakker, \{Sidhaant Sachin\} and Simranjeet Singh and Farhad Merchant and Vikas Rana and Anupam Chattopadhyay",

note = "Publisher Copyright: {\textcopyright} 2024 IEEE.; 37th International Conference on VLSI Design, VLSID 2024 ; Conference date: 06-01-2024 Through 10-01-2024",

year = "2024",

doi = "10.1109/VLSID60093.2024.00099",

language = "English",

series = "Proceedings of the IEEE International Conference on VLSI Design",

publisher = "IEEE Computer Society",

pages = "560--564",

booktitle = "Proceedings - 37th International Conference on VLSI Design, VLSID 2024 - held concurrently with 23rd International Conference on Embedded Systems, ES 2024",

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}

Rajendran, G, Zahoor, F, Thakker, SS, Singh, S, Merchant, F, Rana, V & Chattopadhyay, A 2024, Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG. in Proceedings - 37th International Conference on VLSI Design, VLSID 2024 - held concurrently with 23rd International Conference on Embedded Systems, ES 2024. Proceedings of the IEEE International Conference on VLSI Design, IEEE Computer Society, pp. 560-564, 37th International Conference on VLSI Design, VLSID 2024, Kolkata, West Bengal, India, 6/01/24. https://doi.org/10.1109/VLSID60093.2024.00099

Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG. / Rajendran, Gokulnath; Zahoor, Furqan; Thakker, Sidhaant Sachin et al.
Proceedings - 37th International Conference on VLSI Design, VLSID 2024 - held concurrently with 23rd International Conference on Embedded Systems, ES 2024. IEEE Computer Society, 2024. p. 560-564 (Proceedings of the IEEE International Conference on VLSI Design).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T2 - 37th International Conference on VLSI Design, VLSID 2024

AU - Rajendran, Gokulnath

AU - Zahoor, Furqan

AU - Thakker, Sidhaant Sachin

AU - Singh, Simranjeet

AU - Merchant, Farhad

AU - Rana, Vikas

AU - Chattopadhyay, Anupam

PY - 2024

Y1 - 2024

N2 - Physical Unclonable Functions (PUF) and Random Number Generators (RNG) are two fundamental security components with applications in various tasks of a security protocol, such as key establishment, identity management, and authentication. In recent times, researchers have proposed various PUF and RNG constructions using RRAMs, demonstrating excellent properties, low energy consumption, and resistance to modelling attacks. Underlying these PUF and RNG constructions, the source of entropy remains the same, and therefore, it is natural to design a unified RRAM-based architecture to function both as a PUF and an RNG. This is accomplished in the current paper. We propose a unified Parity-RRAM PUF (PR-PUF) and RNG construction and validate it for well-known PUF characteristics and RNG randomness properties with the NIST test suite SP 800-22. We present detailed design analysis and simulation-based studies to substantiate our ideas.

AB - Physical Unclonable Functions (PUF) and Random Number Generators (RNG) are two fundamental security components with applications in various tasks of a security protocol, such as key establishment, identity management, and authentication. In recent times, researchers have proposed various PUF and RNG constructions using RRAMs, demonstrating excellent properties, low energy consumption, and resistance to modelling attacks. Underlying these PUF and RNG constructions, the source of entropy remains the same, and therefore, it is natural to design a unified RRAM-based architecture to function both as a PUF and an RNG. This is accomplished in the current paper. We propose a unified Parity-RRAM PUF (PR-PUF) and RNG construction and validate it for well-known PUF characteristics and RNG randomness properties with the NIST test suite SP 800-22. We present detailed design analysis and simulation-based studies to substantiate our ideas.

KW - PUF

KW - RNG

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M3 - Conference contribution

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T3 - Proceedings of the IEEE International Conference on VLSI Design

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BT - Proceedings - 37th International Conference on VLSI Design, VLSID 2024 - held concurrently with 23rd International Conference on Embedded Systems, ES 2024

PB - IEEE Computer Society

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ER -

Rajendran G, Zahoor F, Thakker SS, Singh S, Merchant F, Rana V et al. Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG. In Proceedings - 37th International Conference on VLSI Design, VLSID 2024 - held concurrently with 23rd International Conference on Embedded Systems, ES 2024. IEEE Computer Society. 2024. p. 560-564. (Proceedings of the IEEE International Conference on VLSI Design). doi: 10.1109/VLSID60093.2024.00099

Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG

Abstract

Publication series

Conference

Bibliographical note

Keywords

ASJC Scopus subject areas

Access to Document

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Cite this