Graphene/hBN–based valley transistor: Dynamic control of valley current in synchronized nonzero voltages within the time-dependent regime

  • A. Belayadi*
  • , C. I. Osuala
  • , I. Assi
  • , N. A. Hadadi
  • , J. P.F. LeBlanc
  • , A. Abbout
  • *Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

Graphene/hexagonal boron nitride (hBN) heterostructures represent a promising class of metal–insulator–semiconductor systems widely explored for multifunctional digital device applications. In this work, we demonstrate that graphene, when influenced by carrier-dependent trapping in the hBN spacer, triggered by a localized potential from Kelvin probe force microscopy (KPFM), can exhibit the behavior of a valley transistor under specific conditions. We employ a tight-binding model that self-consistently incorporates a Gaussian-shaped potential to represent the effect of the tip gate. Crucially, we show that the heterostructure can function as a field-effect transistor (FET), with its operation governed by the bias gate (which shifts the Fermi level) and the tip-induced potential (which breaks electron–hole symmetry by selectively trapping electron or hole quasiparticles). Our results reveal that, under specific conditions involving lattice geometry, pulse frequency, and gate voltages, the device exhibits valley transistor functionality. The valley current (IK1=−K or IK2=+K) can be selectively controlled by synchronizing the frequencies and polarities of the tip and bias gate voltages. Notably, when both gates are driven with the same polarity, the graphene channel outputs a periodically modulated, pure valley-polarized current. This enables the device to switch between distinct ON/OFF valley current states even at finite bias. Interestingly, when the IK1=−K current is in the ON (forward current) state, the IK2=+K current is OFF. Reversing the gate polarity inverts this behavior: IK1=−K becomes OFF, while IK2=+K) turns ON (reversed-current). These findings pave the way toward realizing low-voltage valley transistors within metal–insulator–semiconductor architectures, offering avenues for multifunctional applications in valleytronics and advanced gating technologies.

Original languageEnglish
Article number165411
Pages (from-to)1-11
Number of pages11
JournalPhysical Review B
Volume112
Issue number16
DOIs
StatePublished - 8 Oct 2025

Bibliographical note

Publisher Copyright:
©2025 American Physical Society

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics

Fingerprint

Dive into the research topics of 'Graphene/hBN–based valley transistor: Dynamic control of valley current in synchronized nonzero voltages within the time-dependent regime'. Together they form a unique fingerprint.

Cite this