Abstract
In this tutorial paper the area of formal verification of DSP VLSI architectures is presented. The paper discusses the following topics: production systems, formal logic, the equational approach, and the signal flow graph approach. Each approach is explained using one or more of the current available systems.
| Original language | English |
|---|---|
| Pages | 351-355 |
| Number of pages | 5 |
| State | Published - 1994 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering