Enhancing performance of iterative heuristics for VLSI netlist partitioning

Sadiq M. Sait; Aimn H. El-Maleh; Raslan H. Al-Abnji

doi:10.1109/ICECS.2003.1301833

Enhancing performance of iterative heuristics for VLSI netlist partitioning

Sadiq M. Sait, Aimn H. El-Maleh, Raslan H. Al-Abnji

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

In this paper we, present a new heuristic called PowerFM which is a modification of the well-known Fidducia Mattheyeses algorithm for VLSI netlist partitioning. PowerFM considers the minimization of power consumption due to the nets cut. The advantages of using PowerFM as an initial solution generator for other iterative algorithms, in panicular Genetic Algorithm (GA) and Tabu Search (TS), for multiobjective optimization is investigated. A series of experiments are conducted on ISCAS-85/89 benchmark circuits to evaluate the efficiency of the PawerFM algorithm. Results suggest that this heuristic would provide a good starting solution for multiobjective optimization using iterative algorithms.

Original language	English
Title of host publication	ICECS 2003 - Proceedings of the 2003 10th IEEE International Conference on Electronics, Circuits and Systems
Pages	507-510
Number of pages	4
DOIs	https://doi.org/10.1109/ICECS.2003.1301833
State	Published - 2003

Publication series

Name	Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Volume	2

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/ICECS.2003.1301833

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Sait, S. M., El-Maleh, A. H., & Al-Abnji, R. H. (2003). Enhancing performance of iterative heuristics for VLSI netlist partitioning. In ICECS 2003 - Proceedings of the 2003 10th IEEE International Conference on Electronics, Circuits and Systems (pp. 507-510). Article 301833 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems; Vol. 2). https://doi.org/10.1109/ICECS.2003.1301833

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title = "Enhancing performance of iterative heuristics for VLSI netlist partitioning",

abstract = "In this paper we, present a new heuristic called PowerFM which is a modification of the well-known Fidducia Mattheyeses algorithm for VLSI netlist partitioning. PowerFM considers the minimization of power consumption due to the nets cut. The advantages of using PowerFM as an initial solution generator for other iterative algorithms, in panicular Genetic Algorithm (GA) and Tabu Search (TS), for multiobjective optimization is investigated. A series of experiments are conducted on ISCAS-85/89 benchmark circuits to evaluate the efficiency of the PawerFM algorithm. Results suggest that this heuristic would provide a good starting solution for multiobjective optimization using iterative algorithms.",

author = "Sait, \{Sadiq M.\} and El-Maleh, \{Aimn H.\} and Al-Abnji, \{Raslan H.\}",

year = "2003",

doi = "10.1109/ICECS.2003.1301833",

language = "English",

isbn = "0780381637",

series = "Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems",

pages = "507--510",

booktitle = "ICECS 2003 - Proceedings of the 2003 10th IEEE International Conference on Electronics, Circuits and Systems",

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Sait, SM , El-Maleh, AH & Al-Abnji, RH 2003, Enhancing performance of iterative heuristics for VLSI netlist partitioning. in ICECS 2003 - Proceedings of the 2003 10th IEEE International Conference on Electronics, Circuits and Systems., 301833, Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, vol. 2, pp. 507-510. https://doi.org/10.1109/ICECS.2003.1301833

Enhancing performance of iterative heuristics for VLSI netlist partitioning. / Sait, Sadiq M.; El-Maleh, Aimn H.; Al-Abnji, Raslan H.
ICECS 2003 - Proceedings of the 2003 10th IEEE International Conference on Electronics, Circuits and Systems. 2003. p. 507-510 301833 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems; Vol. 2).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Enhancing performance of iterative heuristics for VLSI netlist partitioning

AU - Sait, Sadiq M.

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AU - Al-Abnji, Raslan H.

PY - 2003

Y1 - 2003

N2 - In this paper we, present a new heuristic called PowerFM which is a modification of the well-known Fidducia Mattheyeses algorithm for VLSI netlist partitioning. PowerFM considers the minimization of power consumption due to the nets cut. The advantages of using PowerFM as an initial solution generator for other iterative algorithms, in panicular Genetic Algorithm (GA) and Tabu Search (TS), for multiobjective optimization is investigated. A series of experiments are conducted on ISCAS-85/89 benchmark circuits to evaluate the efficiency of the PawerFM algorithm. Results suggest that this heuristic would provide a good starting solution for multiobjective optimization using iterative algorithms.

AB - In this paper we, present a new heuristic called PowerFM which is a modification of the well-known Fidducia Mattheyeses algorithm for VLSI netlist partitioning. PowerFM considers the minimization of power consumption due to the nets cut. The advantages of using PowerFM as an initial solution generator for other iterative algorithms, in panicular Genetic Algorithm (GA) and Tabu Search (TS), for multiobjective optimization is investigated. A series of experiments are conducted on ISCAS-85/89 benchmark circuits to evaluate the efficiency of the PawerFM algorithm. Results suggest that this heuristic would provide a good starting solution for multiobjective optimization using iterative algorithms.

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DO - 10.1109/ICECS.2003.1301833

M3 - Conference contribution

AN - SCOPUS:31744446931

SN - 0780381637

SN - 9780780381636

T3 - Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

SP - 507

EP - 510

BT - ICECS 2003 - Proceedings of the 2003 10th IEEE International Conference on Electronics, Circuits and Systems

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Sait SM , El-Maleh AH, Al-Abnji RH. Enhancing performance of iterative heuristics for VLSI netlist partitioning. In ICECS 2003 - Proceedings of the 2003 10th IEEE International Conference on Electronics, Circuits and Systems. 2003. p. 507-510. 301833. (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems). doi: 10.1109/ICECS.2003.1301833

Enhancing performance of iterative heuristics for VLSI netlist partitioning

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