Design of Fault Tolerant Adders: A Review

Ghashmi H. Bin Talib, Aiman H. El-Maleh*, Sadiq M. Sait

*Corresponding author for this work

Research output: Contribution to journalReview articlepeer-review

7 Scopus citations


Arithmetic circuits, especially the adder, are the heart of any computing system that comprises numerous processing units ranging from small digital systems to supercomputers. As a result of the shrinking size of electronic devices, the rate of occurrence of soft errors has increased. Thus, designing soft error tolerant circuits is of great importance. In this paper, various fault tolerant designs required to attain highly reliable adders are depicted. In addition to the review of different fault tolerant designs of carry look-ahead and carry-select adders, this paper also gives their comparative assessment in terms of fault tolerance, area overhead, and weaknesses. The described fault tolerant designs are classified based on their ability to detect or correct faults and the employed redundancy scheme.

Original languageEnglish
Pages (from-to)6667-6692
Number of pages26
JournalArabian Journal for Science and Engineering
Issue number12
StatePublished - 1 Dec 2018

Bibliographical note

Publisher Copyright:
© 2018, King Fahd University of Petroleum & Minerals.


  • Arithmetic circuits
  • Carry look-ahead adders
  • Carry-select adders
  • Fault tolerance
  • Soft errors

ASJC Scopus subject areas

  • General


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