Contention-free Domino logic for scaled-down CMOS technologies with ultra low threshold voltages

Muhammad E.S. Elrabaa; Mohab H. Anis; Mohamed I. Elmasry

doi:10.1109/ISCAS.2000.857204

Contention-free Domino logic for scaled-down CMOS technologies with ultra low threshold voltages

Muhammad E.S. Elrabaa^*
, Mohab H. Anis
, Mohamed I. Elmasry

^*Corresponding author for this work

Research output: Contribution to journal › Conference article › peer-review

5 Scopus citations

Abstract

A new contention-free Domino logic (CF-Domino) that is especially suited for low threshold voltage (LVT) is reported. Its superior noise margin and speed over conventional Domino circuits for LVTs are demonstrated using HSPICE simulations and a 0.25 μm CMOS technology with a supply voltage of 2.5 V. The impacts of the new technique on dynamic and leakage powers and area are also presented.

Original language	English
Pages (from-to)	I-748-I-751
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	1
DOIs	https://doi.org/10.1109/ISCAS.2000.857204
State	Published - 2000
Externally published	Yes

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/ISCAS.2000.857204

Cite this

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title = "Contention-free Domino logic for scaled-down CMOS technologies with ultra low threshold voltages",

abstract = "A new contention-free Domino logic (CF-Domino) that is especially suited for low threshold voltage (LVT) is reported. Its superior noise margin and speed over conventional Domino circuits for LVTs are demonstrated using HSPICE simulations and a 0.25 μm CMOS technology with a supply voltage of 2.5 V. The impacts of the new technique on dynamic and leakage powers and area are also presented.",

author = "Elrabaa, \{Muhammad E.S.\} and Anis, \{Mohab H.\} and Elmasry, \{Mohamed I.\}",

year = "2000",

doi = "10.1109/ISCAS.2000.857204",

language = "English",

volume = "1",

pages = "I--748--I--751",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

issn = "0271-4310",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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T1 - Contention-free Domino logic for scaled-down CMOS technologies with ultra low threshold voltages

AU - Elrabaa, Muhammad E.S.

AU - Anis, Mohab H.

AU - Elmasry, Mohamed I.

PY - 2000

Y1 - 2000

N2 - A new contention-free Domino logic (CF-Domino) that is especially suited for low threshold voltage (LVT) is reported. Its superior noise margin and speed over conventional Domino circuits for LVTs are demonstrated using HSPICE simulations and a 0.25 μm CMOS technology with a supply voltage of 2.5 V. The impacts of the new technique on dynamic and leakage powers and area are also presented.

AB - A new contention-free Domino logic (CF-Domino) that is especially suited for low threshold voltage (LVT) is reported. Its superior noise margin and speed over conventional Domino circuits for LVTs are demonstrated using HSPICE simulations and a 0.25 μm CMOS technology with a supply voltage of 2.5 V. The impacts of the new technique on dynamic and leakage powers and area are also presented.

UR - https://www.scopus.com/pages/publications/0033684596

U2 - 10.1109/ISCAS.2000.857204

DO - 10.1109/ISCAS.2000.857204

M3 - Conference article

AN - SCOPUS:0033684596

SN - 0271-4310

VL - 1

SP - I-748-I-751

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

ER -

Contention-free Domino logic for scaled-down CMOS technologies with ultra low threshold voltages

Abstract

ASJC Scopus subject areas

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