Co-Design of Silicon-Based CMOS Rectifiers and Impedance Matching Networks for Low-Power IoT Systems: Trends and Insights

The growing demand for energy-autonomous Internet of Things (IoT) devices and implantable systems has intensified interest in Radio Frequency Energy Harvesting (RFEH) as a promising power source for ultra-low-power electronics. So, this paper presents a comprehensive technical and critical analysis of the co-design of silicon-based CMOS rectifiers and Impedance Matching Networks (IMNs), which are essential to efficient RF-to-dc energy conversion. Relevant peer-reviewed articles published over the past decade are selected and analyzed using the PRISMA methodology to ensure transparent paper selection. The review examines essential RF design parameters such as operating frequencies, incident power densities, and performance metrics, including Power Conversion Efficiency (PCE) and sensitivity, providing data-driven insights for circuit optimization. Various cross-coupled rectifier topologies, including static, dynamic, and hybrid gate/body-biasing schemes, along with widely adopted IMN architectures, are categorized and evaluated, together with their mathematical foundations. To better reflect real-world behavior, an enhanced electrical equivalent model is developed that captures parasitic effects from bond wires, PCB traces, and I/O PADs. The paper also reviews measured co-design implementations and discusses integration strategies suitable for on-chip and off-chip scenarios in wearables, implantables, and remote IoT nodes. Common measurement practices are assessed, with practical guidance provided for setup optimization. Finally, the study identifies key research gaps and future directions, and proposes a structured flowchart-based design methodology to enhance design productivity, reduce iteration cycles, and support the development of compact, high-efficiency RF energy-harvesting systems.