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CMOS two-stage amplifier design approach

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

This paper is a simple way to describe the design approach of a two-stage CMOS operational amplifier single power supply by using an algorithm manner. Based on a clear understanding of the required specifications, the proposed approach is developed to drive capacitive load (CL). This paper describes also measuring these specifications and improves it to get a good performance. The Dc gain, Gain band width product (GBWP), Slew Rate(SR), Input Common Mode Range (ICMR), Output Swing, Phase Margin, Gain Margin, Input offset voltage, Total Harmonic Distortion (THD), Power Supply Rejection Ratio (PSRR) and Power dissipation are considered in the proposed algorithm. This design is based on 0.13 μm IBM-CMOS process parameters.

Original languageEnglish
Title of host publicationLatest Trends on Circuits - 14th WSEAS International Conference on Circuits, Part of the 14th WSEAS CSCC Multiconference
Pages21-24
Number of pages4
StatePublished - 2010
Externally publishedYes
Event14th WSEAS International Conference on Circuits, Part of the 14th WSEAS CSCC Multiconference - Corfu Island, Greece
Duration: 22 Jul 201024 Jul 2010

Publication series

NameInternational Conference on Circuits - Proceedings

Conference

Conference14th WSEAS International Conference on Circuits, Part of the 14th WSEAS CSCC Multiconference
Country/TerritoryGreece
CityCorfu Island
Period22/07/1024/07/10

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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