Abstract
In this paper, the performance of a switch for ATM networks is evaluated. To evaluate this type of switch, four conflicting objectives, the average throughput rate (to be maximized), the average switch utilization (to be maximized), the average work-in-process (to be minimized), and the average resident time (to be minimized) are considered. A simulation model of the serial switches for ATM networks is developed and used to evaluate an ATM network for a fixed total number of buffers. The simulation model is also used to generate an efficient set of buffer allocations. Then the Analytic Hierarchy Process (AHP) is utilized to identify the most-preferred buffer allocation. Illustrative examples are given. The results provide guidelines for ATM network practice in allocating buffers and improving switch performance.
| Original language | English |
|---|---|
| Pages (from-to) | 379-386 |
| Number of pages | 8 |
| Journal | Computer Systems Science and Engineering |
| Volume | 13 |
| Issue number | 6 |
| State | Published - Nov 1998 |
Keywords
- AHP
- ATM switches
- Buffer management
- Multi-objective
ASJC Scopus subject areas
- Control and Systems Engineering
- Theoretical Computer Science
- General Computer Science