Bit-level pipelined digit serial GF(2m) multiplier

M. K. Ibrahim; A. Almulhem

doi:10.1109/ISCAS.2001.922305

Bit-level pipelined digit serial GF(2^m) multiplier

M. K. Ibrahim
, A. Almulhem

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

A low latency digit serial multiplier for GF(2/sup m/) that can be pipelined to the bit-level is presented in this paper. Unlike existing structures, the new multiplier does not put any restriction on the type of generator polynomial used or the digit size. Furthermore, the latency of the new multiplier is significantly less than the latency of the existing bit-level pipelined digit-serial multiplier.

Original language	English
Title of host publication	ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Pages	586-589
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2001.922305
State	Published - 2001

Publication series

Name	ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Volume	4

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/ISCAS.2001.922305

Cite this

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title = "Bit-level pipelined digit serial GF(2m) multiplier",

abstract = "A low latency digit serial multiplier for GF(2/sup m/) that can be pipelined to the bit-level is presented in this paper. Unlike existing structures, the new multiplier does not put any restriction on the type of generator polynomial used or the digit size. Furthermore, the latency of the new multiplier is significantly less than the latency of the existing bit-level pipelined digit-serial multiplier.",

author = "Ibrahim, \{M. K.\} and A. Almulhem",

year = "2001",

doi = "10.1109/ISCAS.2001.922305",

language = "English",

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series = "ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings",

pages = "586--589",

booktitle = "ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings",

}

Bit-level pipelined digit serial GF(2^m) multiplier. / Ibrahim, M. K.; Almulhem, A.
ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. 2001. p. 586-589 922305 (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; Vol. 4).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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