Analysis of Macro-Dataflow Dynamic Scheduling on Nonuniform Memory Access Architectures

M. Al-Mouhamed*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

This paper studies dynamic scheduling of computational tasks with communication costs using nonuniform memory access architecture. The computing model assumes that data transfer can be partitioned into parallel and sequential parts with respect to the task execution. A scheduling heuristic, called least-communication (LC), together with a two-level scheduler is proposed in an attempt to minimize the finish time. The LC selects the task that removes the largest amount of remaining data transfer, if no such tasks are available the task that has been ready to run at the earliest is selected first. Analysis shows that scheduling n tasks on m processors gives a schedule length ωlcthat satisfies ωlc (2 — 1/m)ωopt + ΔtΣCs(Ti, Ti+1) + (n/m + (1 - 1/m)L)(hlc - h0pt), where ω opt is the length of an optimum solution for scheduling with no communication costs, ∑ Cs is the sum of sequential data transfer for all the arcs (Ti, Ti+1) along a chain of L tasks whose computation and data transfer times cover all the idle times in the schedule, At is the time to transfer one operand to memory, and hopt and hlc are the task scheduling overheads in case of optimum and LC scheduling, respectively. The time complexity of LC is O(n2). Testing the finish time of LC and FCFS shows that LC is useful for tasks having moderate granularity and whose computation and communication requirements vary widely for different data sets.

Original languageEnglish
Pages (from-to)875-888
Number of pages14
JournalIEEE Transactions on Parallel and Distributed Systems
Volume4
Issue number8
DOIs
StatePublished - Aug 1993

Keywords

  • Dataflow
  • MIMD
  • parallel processing
  • performance analysis
  • scheduling

ASJC Scopus subject areas

  • Signal Processing
  • Hardware and Architecture
  • Computational Theory and Mathematics

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