@inproceedings{96d6d22a6bb843c69ea9d91907358ff7,
title = "An improved current mirror cell",
abstract = "A new configuration for the design of a current mirror is presented. The proposed configuration eliminates the DC matching error caused by the difference between drain-to-source voltages of both input and output transistors. The circuit can be used to enhance the accuracy of analog circuits for current levels from 0 to few hundreds microamperes The proposed configuration was verified by HSPICE simulator level 49 in 0.8μm CMOS process technology. Simulation results show that DC matching error is substantially reduced compared to the cascade configuration.",
keywords = "Analog blocks, Cascode mirror, Current mirror, DC matching error, Mismatch",
author = "Al-Absi, \{Munir A.\}",
year = "2006",
doi = "10.1109/aiccsa.2006.205133",
language = "English",
isbn = "1424402123",
series = "IEEE International Conference on Computer Systems and Applications, 2006",
publisher = "IEEE Computer Society",
pages = "472--474",
booktitle = "IEEE International Conference on Computer Systems and Applications, 2006",
address = "United States",
}