An efficient method for generating assembly precedence constraints on 3D models based on a block sequence structure

An efficient method is introduced for generating assembly precedence constraints on three-dimensional (3D) models based on a block sequence structure, with the purpose of enhancing the simulation quality of assembly precedence constraints and reducing the development cost of virtual assembly (VA)/virtual disassembly (VD) software. Firstly, we propose a block sequence structure to store and process the attribute data characterizing assembly precedence constraints and the reference variable of paths. Then the approaches to convert a block sequence to the next state for controlling the subsequent VA/VD operations are expounded. In the random-access memory, each assembly reference object is regarded as a node for distributed management of the precedence constraints of its paths. Therefore, the tedious preprocessing for each part model is not required. Meanwhile, the VA/VD process can be flexibly switched due to calculation and processing on the precedence relation data instead of separately setting and executing the assembly/disassembly sequences. The block sequence and state transition approaches can be programmed as the software development kit (SDK) providing parameter-input interfaces for different virtual simulation platforms, so the interactive VA/VD simulation can be efficiently developed without programming skills. For the practical application, we program and package an SDK for Unity3d and further evaluate its usability in aiding in the development of precedence constraints for VA/VD applications.