ALCOR, a mixed-signal ASIC for SiPM readout of the ePIC-dRICH detector at the EIC

ALCOR is a mixed-signal ASIC developed for the readout of silicon photomultiplier (SiPM) sensors in the ePIC dual-radiator RICH (dRICH) detector at the future Electron-Ion Collider (EIC). The current design integrates 32 channels in an 8×4 pixel array, providing high-precision timestamping with single-photon sensitivity, data-push architecture and fully digital output. Each channel features an analog front-end compatible with both signal polarities, comprising a low-impedance input stage, four selectable gain settings, and two leading-edge discriminators with independent 6-bit DAC thresholds. Precise timing is achieved by quad-buffered, low-power TDCs with analog interpolation and 20–40 ps time bin. Additional operating modes, including time-over-threshold and slew-rate, provide indirect amplitude measurements and effective time-walk correction. The power consumption of the full channel is 12 mW with default settings. Fabricated in 110 nm CMOS technology, ALCOR has been thoroughly validated in standalone operation and coupled with multiple SiPM models. Laboratory tests using single-photon laser pulses and HPK S13360 devices demonstrated an overall time resolution below 150 ps RMS. Two beam test campaigns at CERN-PS in 2023 and 2024, employing a dRICH prototype instrumented with 2048 3×3 mm² SiPMs read out by ALCOR, confirmed its suitability for ring-imaging and particle-identification. A new version of the ASIC, named ALCOR-64, was designed and submitted for fabrication in April 2025. This version doubles the channel count to 64, integrates the ASIC in a ball grid array package and addresses specific EIC-driven requirements, including a programmable-width hardware shutter to inhibit events digitization and thus suppress the SiPM out-of-time DCR-induced background.