A two-phase return-to-zero (RZ) asynchronous transceiver circuit for pipe-lined SoC interconnects

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Abstract

A new delay-insensitive two-phase asynchronous handshaking protocol has been developed. The new protocol utilizes return to zero data format which simplifies communication circuits design significantly. Robust transceiver circuitry that implement this protocol have been developed and simulated using a 0.13μm, 1.2V technology to verify their performance.

Original languageEnglish
Title of host publication2008 International Symposium on System-on-Chip Proceedings, SOC 2008
DOIs
StatePublished - 2008

Publication series

Name2008 International Symposium on System-on-Chip Proceedings, SOC 2008

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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