Abstract
A High Gain High-Level switched-capacitor multilevel inverter with low voltage stress requires a lower number of devices at peak output voltage and a reduced number of circuit components along with an increase in voltage boosting capability. The features of the proposed topology include inherent boosting (Gain: 3) and self-voltage balancing properties. To avoid complex algorithms, calculations and obtain superior quality output voltage the nearest level control (NLC) modulation technique is used. The extension of the topology has also been derived for the higher voltage gain and levels by adding four switches and one capacitor. The proposed topology has been compared with the recently developed topologies. The power loss analysis and simulation analysis has been done with different loading conditions under the environment of PLECS 4.2.18 and MATLAB® 2018a, respectively. A hardware bench has been set up to show the verification of the simulation results with hardware results.
| Original language | English |
|---|---|
| Pages (from-to) | 4434-4458 |
| Number of pages | 25 |
| Journal | International Journal of Circuit Theory and Applications |
| Volume | 50 |
| Issue number | 12 |
| DOIs | |
| State | Published - Dec 2022 |
Bibliographical note
Publisher Copyright:© 2022 John Wiley & Sons Ltd.
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- boost inverter
- DC-AC power converter
- inverter
- power electronics
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Computer Science Applications
- Electrical and Electronic Engineering
- Applied Mathematics
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