A novel source-body biasing technique for RF to DC voltage multipliers in 0.18m CMOS technology

Feras Al-Dirini; Mahmood Mohammed; Murad Mohammad; Fadi Shahroury

A novel source-body biasing technique for RF to DC voltage multipliers in 0.18m CMOS technology

Feras Al-Dirini^*, Mahmood Mohammed, Murad Mohammad, Fadi Shahroury

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

This paper presents a novel source-body biasing technique for RF to DC voltage multipliers designed in 0.18 m CMOS Technology for applications where CMOS integration is required. The proposed technique increases voltage gain and efficiency by cancelling body effect and reverse leakage currents. Simulation results using HSPICE software are presented to verify and illustrate the technique by applying it to different topologies tested at different frequencies. Results show that Peak Conversion Efficiencies (PCE) as high as 16.7% can be achieved.

Original language	English
Title of host publication	2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011
Pages	276-280
Number of pages	5
State	Published - 2011
Externally published	Yes

Publication series

Name	2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011

Keywords

Body Effect
IMD
RFID
Rectifier
Voltage Multiplier

ASJC Scopus subject areas

Computer Graphics and Computer-Aided Design
Computer Science Applications
Software
Electrical and Electronic Engineering

Cite this

Al-Dirini, F., Mohammed, M., Mohammad, M., & Shahroury, F. (2011). A novel source-body biasing technique for RF to DC voltage multipliers in 0.18m CMOS technology. In 2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011 (pp. 276-280). Article 5744466 (2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011).

Al-Dirini, Feras ; Mohammed, Mahmood ; Mohammad, Murad et al. / A novel source-body biasing technique for RF to DC voltage multipliers in 0.18m CMOS technology. 2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011. 2011. pp. 276-280 (2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011).

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title = "A novel source-body biasing technique for RF to DC voltage multipliers in 0.18m CMOS technology",

abstract = "This paper presents a novel source-body biasing technique for RF to DC voltage multipliers designed in 0.18 m CMOS Technology for applications where CMOS integration is required. The proposed technique increases voltage gain and efficiency by cancelling body effect and reverse leakage currents. Simulation results using HSPICE software are presented to verify and illustrate the technique by applying it to different topologies tested at different frequencies. Results show that Peak Conversion Efficiencies (PCE) as high as 16.7% can be achieved.",

keywords = "Body Effect, IMD, RFID, Rectifier, Voltage Multiplier",

author = "Feras Al-Dirini and Mahmood Mohammed and Murad Mohammad and Fadi Shahroury",

year = "2011",

language = "English",

isbn = "9789662191165",

series = "2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011",

pages = "276--280",

booktitle = "2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011",

}

Al-Dirini, F, Mohammed, M, Mohammad, M & Shahroury, F 2011, A novel source-body biasing technique for RF to DC voltage multipliers in 0.18m CMOS technology. in 2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011., 5744466, 2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011, pp. 276-280.

A novel source-body biasing technique for RF to DC voltage multipliers in 0.18m CMOS technology. / Al-Dirini, Feras; Mohammed, Mahmood; Mohammad, Murad et al.
2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011. 2011. p. 276-280 5744466 (2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A novel source-body biasing technique for RF to DC voltage multipliers in 0.18m CMOS technology

AU - Al-Dirini, Feras

AU - Mohammed, Mahmood

AU - Mohammad, Murad

AU - Shahroury, Fadi

PY - 2011

Y1 - 2011

N2 - This paper presents a novel source-body biasing technique for RF to DC voltage multipliers designed in 0.18 m CMOS Technology for applications where CMOS integration is required. The proposed technique increases voltage gain and efficiency by cancelling body effect and reverse leakage currents. Simulation results using HSPICE software are presented to verify and illustrate the technique by applying it to different topologies tested at different frequencies. Results show that Peak Conversion Efficiencies (PCE) as high as 16.7% can be achieved.

AB - This paper presents a novel source-body biasing technique for RF to DC voltage multipliers designed in 0.18 m CMOS Technology for applications where CMOS integration is required. The proposed technique increases voltage gain and efficiency by cancelling body effect and reverse leakage currents. Simulation results using HSPICE software are presented to verify and illustrate the technique by applying it to different topologies tested at different frequencies. Results show that Peak Conversion Efficiencies (PCE) as high as 16.7% can be achieved.

KW - Body Effect

KW - IMD

KW - RFID

KW - Rectifier

KW - Voltage Multiplier

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M3 - Conference contribution

AN - SCOPUS:79955770163

SN - 9789662191165

T3 - 2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011

SP - 276

EP - 280

BT - 2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011

ER -

Al-Dirini F, Mohammed M, Mohammad M, Shahroury F. A novel source-body biasing technique for RF to DC voltage multipliers in 0.18m CMOS technology. In 2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011. 2011. p. 276-280. 5744466. (2011 11th International Conference - The Experience of Designing and Application of CAD Systems in Microelectronics, CADSM 2011).

A novel source-body biasing technique for RF to DC voltage multipliers in 0.18m CMOS technology

Abstract

Publication series

Keywords

ASJC Scopus subject areas

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Cite this