A novel compact and tunable positive and negative impedance simulator and multiplier

Muneer A. Al-Absi*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review


This paper presents a novel CMOS tunable positive and negative active inductor simulator (AIS), positive capacitance and resistance multiplier, and negative capacitance and resistance simulator. The proposed designs use only one analog building block (ABB), one grounded capacitor, and two resistors. Applications to the proposed designs in different types of tunable filters and parasitic compensation schemes are also presented. The functionality of the designs is confirmed using Tanner Tspice in 0.18 μm TSMC CMOS technology. Simulation results indicate that the proposed designs are superior to previous arts in number of ABB, number of functions, and power consumptions.

Original languageEnglish
Pages (from-to)1587-1596
Number of pages10
JournalInternational Journal of Circuit Theory and Applications
Issue number3
StatePublished - Mar 2024

Bibliographical note

Publisher Copyright:
© 2023 John Wiley & Sons Ltd.


  • active inductor simulator
  • filters
  • impedance multiplier
  • integrated circuits
  • negative impedance simulator
  • parasitic compensation

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Computer Science Applications
  • Electrical and Electronic Engineering
  • Applied Mathematics


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