Abstract
This paper presents a new compact CMOS capacitance multiplier. The multiplier is based on using the trnaslinear principle. Only four MOSFETs operating in subthreshold region are used. The multiplication factor is controllable to meet the designer requirements. Tanner TSPICE simulator is used to confirm the functionality of the design in 0.18μm CMOS Technology. The circuit operates from ±0.75 supply voltage. Simulation results indicate that the multiplication factor is large compared to existing designs. The functionality of the proposed capacitance multiplier is demonstrated by using it in designing relaxation oscillator.
| Original language | English |
|---|---|
| Title of host publication | 13th International Multi-Conference on Systems, Signals and Devices, SSD 2016 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 695-698 |
| Number of pages | 4 |
| ISBN (Electronic) | 9781509012916 |
| DOIs | |
| State | Published - 18 May 2016 |
Publication series
| Name | 13th International Multi-Conference on Systems, Signals and Devices, SSD 2016 |
|---|
Bibliographical note
Publisher Copyright:© 2016 IEEE.
Keywords
- Biomedical circuits
- Capacitance multiplier
- Low frequency filters
- Oscillators
- Translinear loop
ASJC Scopus subject areas
- Signal Processing
- Control and Systems Engineering
- Energy Engineering and Power Technology
- Control and Optimization
- Computer Networks and Communications
- Instrumentation
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