Abstract
Multilevel inverters (MLI) are now becoming an important element for medium-voltage highpower applications. A low switch count MLIs are more popular due to their high efficiency, low cost, and easy control for the output having a higher number of levels. A new MLI topology for single-phase applications based on switched dc voltage source with reduced switch count is proposed in the paper. The presented topology is developed with the constraints of lesser blocking voltage of the switches with a higher number of levels at the output using a lower number of components. The proposed topology can also work in the symmetrical and asymmetrical configuration. Selective harmonic elimination (SHE) technique is applied to synthesize the staircase output voltages with eliminations of lower order harmonics by optimized computation of angles for switching operation. The comparative studies with the MLIs recommended in recent times show the importance of the proposed MLI structure in terms of reduced switch count and lower voltage stresses across switches in both asymmetrical and symmetrical configurations. The experimental results are presented to confirm the performance of the proposed topology.
| Original language | English |
|---|---|
| Pages (from-to) | 188726-188741 |
| Number of pages | 16 |
| Journal | IEEE Access |
| Volume | 8 |
| DOIs | |
| State | Published - 2020 |
| Externally published | Yes |
Bibliographical note
Publisher Copyright:© 2020 Institute of Electrical and Electronics Engineers Inc.. All rights reserved.
Keywords
- Asymmetrical sources
- Multilevel inverter
- Reduced semiconductor devices
- Selective harmonics elimination
- Symmetrical sources
- Total standing voltage
ASJC Scopus subject areas
- General Computer Science
- General Materials Science
- General Engineering
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