A new compact CMOS C-multiplier

Munir Ahmad Al-Absi; Eyas Saleh Al-Suhaibani; Muhammad Taher Abuelma’atti

doi:10.1007/s10470-016-0822-1

A new compact CMOS C-multiplier

Munir Ahmad Al-Absi^*, Eyas Saleh Al-Suhaibani, Muhammad Taher Abuelma’atti

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

22 Scopus citations

Abstract

This paper presents a new compact CMOS capacitance multiplier. The multiplier is based on using the translinear principle with MOSFETs operating in subthreshold region. The multiplication factor is controllable to meet the designer requirements. Tanner TSPICE simulator was used to confirm the functionality of the design in 0.18 µm CMOS Technology. The circuit operates from ±0.75 supply voltage. Simulation results indicate that the multiplication factor can be varied from 10 to 300. The functionality of the proposed capacitance multiplier was demonstrated by using it in designing a low pass filter and a relaxation oscillator.

Original language	English
Pages (from-to)	653-658
Number of pages	6
Journal	Analog Integrated Circuits and Signal Processing
Volume	90
Issue number	3
DOIs	https://doi.org/10.1007/s10470-016-0822-1
State	Published - 1 Mar 2017

Bibliographical note

Publisher Copyright:
© 2016, Springer Science+Business Media New York.

Keywords

Biomedical circuits
Capacitance multiplier
Low frequency filters
Oscillators
Translinear loop

ASJC Scopus subject areas

Signal Processing
Hardware and Architecture
Surfaces, Coatings and Films

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10.1007/s10470-016-0822-1

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@article{51033259bb864176a1a4bab92ee38f68,

title = "A new compact CMOS C-multiplier",

abstract = "This paper presents a new compact CMOS capacitance multiplier. The multiplier is based on using the translinear principle with MOSFETs operating in subthreshold region. The multiplication factor is controllable to meet the designer requirements. Tanner TSPICE simulator was used to confirm the functionality of the design in 0.18 µm CMOS Technology. The circuit operates from ±0.75 supply voltage. Simulation results indicate that the multiplication factor can be varied from 10 to 300. The functionality of the proposed capacitance multiplier was demonstrated by using it in designing a low pass filter and a relaxation oscillator.",

keywords = "Biomedical circuits, Capacitance multiplier, Low frequency filters, Oscillators, Translinear loop",

author = "Al-Absi, {Munir Ahmad} and Al-Suhaibani, {Eyas Saleh} and Abuelma{\textquoteright}atti, {Muhammad Taher}",

note = "Publisher Copyright: {\textcopyright} 2016, Springer Science+Business Media New York.",

year = "2017",

month = mar,

day = "1",

doi = "10.1007/s10470-016-0822-1",

language = "English",

volume = "90",

pages = "653--658",

journal = "Analog Integrated Circuits and Signal Processing",

issn = "0925-1030",

publisher = "Springer Netherlands",

number = "3",

}

TY - JOUR

T1 - A new compact CMOS C-multiplier

AU - Al-Absi, Munir Ahmad

AU - Al-Suhaibani, Eyas Saleh

AU - Abuelma’atti, Muhammad Taher

PY - 2017/3/1

Y1 - 2017/3/1

N2 - This paper presents a new compact CMOS capacitance multiplier. The multiplier is based on using the translinear principle with MOSFETs operating in subthreshold region. The multiplication factor is controllable to meet the designer requirements. Tanner TSPICE simulator was used to confirm the functionality of the design in 0.18 µm CMOS Technology. The circuit operates from ±0.75 supply voltage. Simulation results indicate that the multiplication factor can be varied from 10 to 300. The functionality of the proposed capacitance multiplier was demonstrated by using it in designing a low pass filter and a relaxation oscillator.

AB - This paper presents a new compact CMOS capacitance multiplier. The multiplier is based on using the translinear principle with MOSFETs operating in subthreshold region. The multiplication factor is controllable to meet the designer requirements. Tanner TSPICE simulator was used to confirm the functionality of the design in 0.18 µm CMOS Technology. The circuit operates from ±0.75 supply voltage. Simulation results indicate that the multiplication factor can be varied from 10 to 300. The functionality of the proposed capacitance multiplier was demonstrated by using it in designing a low pass filter and a relaxation oscillator.

KW - Biomedical circuits

KW - Capacitance multiplier

KW - Low frequency filters

KW - Oscillators

KW - Translinear loop

UR - http://www.scopus.com/inward/record.url?scp=84981217020&partnerID=8YFLogxK

U2 - 10.1007/s10470-016-0822-1

DO - 10.1007/s10470-016-0822-1

M3 - Article

AN - SCOPUS:84981217020

SN - 0925-1030

VL - 90

SP - 653

EP - 658

JO - Analog Integrated Circuits and Signal Processing

JF - Analog Integrated Circuits and Signal Processing

IS - 3

ER -

A new compact CMOS C-multiplier

Abstract

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Keywords

ASJC Scopus subject areas

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