A new CMOS current-mode controllable-gain square rooting circuit using MOSFET in subthreshold

Eyas Saleh Al-Suhaibani; Munir Ahmad Al-Absi

doi:10.1007/s10470-015-0488-0

A new CMOS current-mode controllable-gain square rooting circuit using MOSFET in subthreshold

Eyas Saleh Al-Suhaibani, Munir Ahmad Al-Absi^*

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

6 Scopus citations

Abstract

A new controllable-gain square rooting circuit using MOS transistors working in weak inversion is proposed. The proposed circuit can be configured to compute the geometric mean between two signals and the square root of the inverse of a signal. Tanner tool is used to confirm the functionality of the circuit in 0.18 µm CMOS TSMC process technology. Simulation results show a 3 dB bandwidth of 2 MHz and a relative error of about 2.4 %. The maximum power consumption is 1.73 µW. The proposed circuit is attractive for low power and low current applications.

Original language	English
Pages (from-to)	431-434
Number of pages	4
Journal	Analog Integrated Circuits and Signal Processing
Volume	82
Issue number	2
DOIs	https://doi.org/10.1007/s10470-015-0488-0
State	Published - Feb 2015

Bibliographical note

Publisher Copyright:
© 2015, Springer Science+Business Media New York.

Keywords

Current mode
Square-root
Translinear principle

ASJC Scopus subject areas

Signal Processing
Hardware and Architecture
Surfaces, Coatings and Films

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10.1007/s10470-015-0488-0

Cite this

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title = "A new CMOS current-mode controllable-gain square rooting circuit using MOSFET in subthreshold",

abstract = "A new controllable-gain square rooting circuit using MOS transistors working in weak inversion is proposed. The proposed circuit can be configured to compute the geometric mean between two signals and the square root of the inverse of a signal. Tanner tool is used to confirm the functionality of the circuit in 0.18 µm CMOS TSMC process technology. Simulation results show a 3 dB bandwidth of 2 MHz and a relative error of about 2.4 \%. The maximum power consumption is 1.73 µW. The proposed circuit is attractive for low power and low current applications.",

keywords = "Current mode, Square-root, Translinear principle",

author = "Al-Suhaibani, \{Eyas Saleh\} and Al-Absi, \{Munir Ahmad\}",

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T1 - A new CMOS current-mode controllable-gain square rooting circuit using MOSFET in subthreshold

AU - Al-Suhaibani, Eyas Saleh

AU - Al-Absi, Munir Ahmad

PY - 2015/2

Y1 - 2015/2

N2 - A new controllable-gain square rooting circuit using MOS transistors working in weak inversion is proposed. The proposed circuit can be configured to compute the geometric mean between two signals and the square root of the inverse of a signal. Tanner tool is used to confirm the functionality of the circuit in 0.18 µm CMOS TSMC process technology. Simulation results show a 3 dB bandwidth of 2 MHz and a relative error of about 2.4 %. The maximum power consumption is 1.73 µW. The proposed circuit is attractive for low power and low current applications.

AB - A new controllable-gain square rooting circuit using MOS transistors working in weak inversion is proposed. The proposed circuit can be configured to compute the geometric mean between two signals and the square root of the inverse of a signal. Tanner tool is used to confirm the functionality of the circuit in 0.18 µm CMOS TSMC process technology. Simulation results show a 3 dB bandwidth of 2 MHz and a relative error of about 2.4 %. The maximum power consumption is 1.73 µW. The proposed circuit is attractive for low power and low current applications.

KW - Current mode

KW - Square-root

KW - Translinear principle

UR - https://www.scopus.com/pages/publications/84925485265

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JO - Analog Integrated Circuits and Signal Processing

JF - Analog Integrated Circuits and Signal Processing

IS - 2

ER -

A new CMOS current-mode controllable-gain square rooting circuit using MOSFET in subthreshold

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

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