A low-cost platform for the prototyping and characterization of digital circuit IPs

Muhammad E.S. Elrabaa; Amran Al-Aghbari; Mohammad Al-Asli; Aiman El-Maleh; Abdelhafid Bouhraoua; Mohammad Alshayeb

doi:10.1016/j.vlsi.2016.01.005

A low-cost platform for the prototyping and characterization of digital circuit IPs

Muhammad E.S. Elrabaa^*, Amran Al-Aghbari, Mohammad Al-Asli, Aiman El-Maleh, Abdelhafid Bouhraoua, Mohammad Alshayeb

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

Abstract

A novel low-cost platform for prototyping and characterizing the performance of digital circuit intellectual properties (IPs) has been developed. Compromised of several HW/SW components, it allows developers of circuit IPs to verify the functionality of any number of IPs on the same prototype chip and characterize their speeds without the need for any expensive test equipment special/custom IP-wrappers, or high-speed test board design. A complete prototype of the proposed platform has been realized and successfully used to test a prototype IC fabricated in a 150 nm technology with frequencies up to 2.1 GHz. Design conditions/constraints for portability to any fabrication process have been developed and verified using measurements from the fabricated IC.

Original language	English
Pages (from-to)	1-9
Number of pages	9
Journal	Integration, the VLSI Journal
Volume	54
DOIs	https://doi.org/10.1016/j.vlsi.2016.01.005
State	Published - 1 Jun 2016

Bibliographical note

Funding Information:
This work was funded by King Abdulaziz City for Science and Technology (KACST) under development grant number MT-4-14/2010 . Authors also acknowledge facilities support by King Fahd University of Petroleum and Minerals .

Publisher Copyright:
© 2016 Elsevier B.V. All rights reserved.

Keywords

ASICs
Circuit intellectual properties
Systems-on-Chip (SOCs)
Test and characterization
Test processors

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1016/j.vlsi.2016.01.005

Cite this

@article{82ef9fb97d6247f5a4fa0b38db1f31db,

title = "A low-cost platform for the prototyping and characterization of digital circuit IPs",

abstract = "A novel low-cost platform for prototyping and characterizing the performance of digital circuit intellectual properties (IPs) has been developed. Compromised of several HW/SW components, it allows developers of circuit IPs to verify the functionality of any number of IPs on the same prototype chip and characterize their speeds without the need for any expensive test equipment special/custom IP-wrappers, or high-speed test board design. A complete prototype of the proposed platform has been realized and successfully used to test a prototype IC fabricated in a 150 nm technology with frequencies up to 2.1 GHz. Design conditions/constraints for portability to any fabrication process have been developed and verified using measurements from the fabricated IC.",

keywords = "ASICs, Circuit intellectual properties, Systems-on-Chip (SOCs), Test and characterization, Test processors",

author = "Elrabaa, {Muhammad E.S.} and Amran Al-Aghbari and Mohammad Al-Asli and Aiman El-Maleh and Abdelhafid Bouhraoua and Mohammad Alshayeb",

note = "Funding Information: This work was funded by King Abdulaziz City for Science and Technology (KACST) under development grant number MT-4-14/2010 . Authors also acknowledge facilities support by King Fahd University of Petroleum and Minerals . Publisher Copyright: {\textcopyright} 2016 Elsevier B.V. All rights reserved.",

year = "2016",

month = jun,

day = "1",

doi = "10.1016/j.vlsi.2016.01.005",

language = "English",

volume = "54",

pages = "1--9",

journal = "Integration, the VLSI Journal",

issn = "0167-9260",

publisher = "Elsevier",

}

TY - JOUR

T1 - A low-cost platform for the prototyping and characterization of digital circuit IPs

AU - Elrabaa, Muhammad E.S.

AU - Al-Aghbari, Amran

AU - Al-Asli, Mohammad

AU - El-Maleh, Aiman

AU - Bouhraoua, Abdelhafid

AU - Alshayeb, Mohammad

N1 - Funding Information: This work was funded by King Abdulaziz City for Science and Technology (KACST) under development grant number MT-4-14/2010 . Authors also acknowledge facilities support by King Fahd University of Petroleum and Minerals . Publisher Copyright: © 2016 Elsevier B.V. All rights reserved.

PY - 2016/6/1

Y1 - 2016/6/1

N2 - A novel low-cost platform for prototyping and characterizing the performance of digital circuit intellectual properties (IPs) has been developed. Compromised of several HW/SW components, it allows developers of circuit IPs to verify the functionality of any number of IPs on the same prototype chip and characterize their speeds without the need for any expensive test equipment special/custom IP-wrappers, or high-speed test board design. A complete prototype of the proposed platform has been realized and successfully used to test a prototype IC fabricated in a 150 nm technology with frequencies up to 2.1 GHz. Design conditions/constraints for portability to any fabrication process have been developed and verified using measurements from the fabricated IC.

AB - A novel low-cost platform for prototyping and characterizing the performance of digital circuit intellectual properties (IPs) has been developed. Compromised of several HW/SW components, it allows developers of circuit IPs to verify the functionality of any number of IPs on the same prototype chip and characterize their speeds without the need for any expensive test equipment special/custom IP-wrappers, or high-speed test board design. A complete prototype of the proposed platform has been realized and successfully used to test a prototype IC fabricated in a 150 nm technology with frequencies up to 2.1 GHz. Design conditions/constraints for portability to any fabrication process have been developed and verified using measurements from the fabricated IC.

KW - ASICs

KW - Circuit intellectual properties

KW - Systems-on-Chip (SOCs)

KW - Test and characterization

KW - Test processors

UR - http://www.scopus.com/inward/record.url?scp=84962382641&partnerID=8YFLogxK

U2 - 10.1016/j.vlsi.2016.01.005

DO - 10.1016/j.vlsi.2016.01.005

M3 - Article

AN - SCOPUS:84962382641

SN - 0167-9260

VL - 54

SP - 1

EP - 9

JO - Integration, the VLSI Journal

JF - Integration, the VLSI Journal

ER -

A low-cost platform for the prototyping and characterization of digital circuit IPs

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

Access to Document

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Cite this