TY - GEN
T1 - A low-cost method for test and speed characterization of digital integrated circuit prototypes
AU - Elrabaa, Muhammad E.S.
AU - Al-Aghbari, Amran A.
AU - Al-Asli, Mohammed A.
PY - 2013
Y1 - 2013
N2 - A novel method for the high-speed test and characterization of digital integrated circuit prototypes has been developed. It utilizes a specially developed off-chip processor and supporting circuitry that is to be included on the prototype chip to facilitate the test and characterization process. The processor administers the user-defined test, receives and stores the test results. The test procedure and data is downloaded to the processor's memory through a standard interface. The supporting circuitry receives the test data serially from the processor, apply it to the selected circuit within the IC, collect and reformat the test results and send it to the processor. It also includes a high-frequency configurable clock generator to be used for performance characterization of the prototyped circuits. This allows the interface between the processor and the prototype chip to be fixed with any circuits being prototyped and tested. This unique hybrid solution, enables testing at full speed with minimal cost compared to the current method of using high-speed test equipments. The proposed method was validated with a complete prototype using FPGAs. A complete layout of the on-chip support circuitry with 4 circuit prototypes had a total area of ∼0.01 mm2 using Lfoundry's 150 nm technology.
AB - A novel method for the high-speed test and characterization of digital integrated circuit prototypes has been developed. It utilizes a specially developed off-chip processor and supporting circuitry that is to be included on the prototype chip to facilitate the test and characterization process. The processor administers the user-defined test, receives and stores the test results. The test procedure and data is downloaded to the processor's memory through a standard interface. The supporting circuitry receives the test data serially from the processor, apply it to the selected circuit within the IC, collect and reformat the test results and send it to the processor. It also includes a high-frequency configurable clock generator to be used for performance characterization of the prototyped circuits. This allows the interface between the processor and the prototype chip to be fixed with any circuits being prototyped and tested. This unique hybrid solution, enables testing at full speed with minimal cost compared to the current method of using high-speed test equipments. The proposed method was validated with a complete prototype using FPGAs. A complete layout of the on-chip support circuitry with 4 circuit prototypes had a total area of ∼0.01 mm2 using Lfoundry's 150 nm technology.
KW - Characterization and Testing
KW - Circuit Intellectual Property
KW - Integrated Circuits
UR - https://www.scopus.com/pages/publications/84881436405
U2 - 10.1109/SIECPC.2013.6550802
DO - 10.1109/SIECPC.2013.6550802
M3 - Conference contribution
AN - SCOPUS:84881436405
SN - 9781467361958
T3 - 2013 Saudi International Electronics, Communications and Photonics Conference, SIECPC 2013
BT - 2013 Saudi International Electronics, Communications and Photonics Conference, SIECPC 2013
ER -