Abstract
A bit-slice microprocessor-based real-time decoder has been proposed in this paper. A microprocessor-based architecture is preferable because of its programability, availability, low cost and simplicity of design. Two strategies are adapted to increase throughput of the decoder for real-time decoding. First, bit-slice microprocessors are used and alu word length is chosen to be equal to that of a code word. Second, decoding operation is accomplished in two steps, namely (1) Error detection and (2) Error correction. It takes relatively much longer time to correct errors. Therefore, a buffer memory is used to store incoming blocks as more than one block may be received during a decoding cycle. The design is versatile since different decoding algorithms can be executed by changing the microprogram. Minor, apparent and simple changes have to be made in the design to decode codes of longer block length.
| Original language | English |
|---|---|
| Pages (from-to) | 97-113 |
| Number of pages | 17 |
| Journal | Microprocessing and Microprogramming |
| Volume | 22 |
| Issue number | 2 |
| DOIs | |
| State | Published - Feb 1988 |
Bibliographical note
Funding Information:The authors acknowledge KFUPM for support of this research.
Keywords
- Bit-slice devices
- Coding
- Decoding
- Microprogramming
- Universal ahpl
ASJC Scopus subject areas
- General Engineering
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