Abstract
In this paper we present a novel fast packet switch architecture based on Banyan interconnection networks, called parallel-tree Banyan switch fabric (PTBSF). It consists of parallel Banyans (multiple outlets) arranged in a tree topology. The packets enter at the topmost Banyan. Internal conflicts are eliminated by using a conflict-free 3×4 switching element which distributes conflicting cells over different Banyans. Thus, cell loss may occur only at the lowest Banyan. Increasing the number of Banyans leads to a noticeable decrease in cell loss rate. The switch can be engineered to provide arbitrarily high throughput and low cell loss rate without the use of input buffering or cell preprocessing. The performance of the switch is evaluated analytically under uniform traffic load and by simulation, under a variety of asynchronous transfer mode (ATM) traffic loads. Compared to other proposed architectures, the switch exhibited stable and excellent performance with respect to cell loss and switching delay for all studied conditions as required by ATM traffic sources. The advantages of PTBSF are modularity, regularity, self-routing, low processing overhead, high throughput and robustness, under a variety of ATM traffic conditions.
| Original language | English |
|---|---|
| Pages (from-to) | 59-77 |
| Number of pages | 19 |
| Journal | International Journal of Communication Systems |
| Volume | 11 |
| Issue number | 1 |
| DOIs | |
| State | Published - 1998 |
Keywords
- ATM switch architecture
- ATM traffic
- Multistage networks
- Performance evaluation
- Simulation
- Traffic modeling
ASJC Scopus subject areas
- Computer Networks and Communications
- Electrical and Electronic Engineering