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A CMOS highly linear digitally programmable active-RC design approach

Research output: Contribution to journalArticlepeer-review

22 Scopus citations

Abstract

A new approach providing the active-RC integrator with programmable time constant is proposed. An inherently linear current division network (CDN) preserving the high linearity property of the active RC technique while providing wide tuning characteristics is adopted. The proposed integrator provides wider tuning range, and higher tuning resolution accompanied with better linearity and/or reduced area than what could be obtained from capacitor and resistor banks. The proposed integrator uses two opamps per integrator just like its MOSFET-C counterpart but it inherently exhibits better linearity and wider tuning range particularly for low voltage supply. A reconfigurable filter exhibiting complex bandpass and normal lowpass responses is realized. Experimental results obtained from a 4th-order filter fabricated in a standard 0.18 μm CMOS process are given. The complex and lowpass filters achieve in-band spurious-free dynamic ranges (SFDRs) of about 70 dB and 71 dB for bandwidths of 1 MHz and 5.5 MHz, respectively.

Original languageEnglish
Article number5941013
Pages (from-to)2636-2646
Number of pages11
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume58
Issue number11
DOIs
StatePublished - 2011

Bibliographical note

Funding Information:
Manuscript received August 15, 2010; revised January 18, 2011; accepted April 15, 2011. Date of publication July 07, 2011; date of current version October 28, 2011. This work was supported by King Abdulaziz City for Science and Technology (KACST) under Project AT-30-212. This paper was recommended by Associate Editor H. Schmid.

Keywords

  • CMOS analog integrated circuits
  • filters

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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