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A CMOS highly linear channel-select filter for 3G multistandard integrated wireless receivers

Research output: Contribution to journalArticlepeer-review

94 Scopus citations

Abstract

A new approach for designing digitally programmable CMOS integrated baseband filters is presented. The proposed technique provides a systematic method for designing filters exhibiting high linearity and low power. A sixth-order Butterworth low-pass filter with 14-bit bandwidth tuning range is designed for implementing the baseband channel-select filter in an integrated multistandard wireless receiver. The filter consumes a current of 2.25 mA from a 2.7-V supply and occupies an area of 1.25 mm2 in a 0.5-μm chip. The proposed filter design achieves high spurious free dynamic ranges (SFDRs) of 92 dB for PDC (IS-54), 89 dB for GSM, 84 dB for IS-95, and 80 dB for WCDMA.

Original languageEnglish
Pages (from-to)27-37
Number of pages11
JournalIEEE Journal of Solid-State Circuits
Volume37
Issue number1
DOIs
StatePublished - Jan 2002
Externally publishedYes

Keywords

  • Baseband chain
  • Channel-select filter
  • Multistandard wireless receivers

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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