A CMOS current-mode squaring circuit free of error resulting from carrier mobility reduction

Munir A. AL-Absi; Ibrahim A. As-Sabban

doi:10.1007/s10470-014-0319-8

A CMOS current-mode squaring circuit free of error resulting from carrier mobility reduction

Munir A. AL-Absi^*, Ibrahim A. As-Sabban

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

This paper presents a new current-mode squaring circuit. The design is based on MOSFETs translinear principle in strong inversion. A new compensation technique to minimize the second order effects caused by carrier mobility reduction in short channel MOSFETs is proposed. Tanner T-spice simulation tool is used to confirm the functionality of the proposed design in 0.18 µm CMOS process technology. Simulation results indicate that the maximum linearity error is 1.2 %; power consumption is 326 µW and bandwidth of 340 MHz.

Original language	English
Pages (from-to)	23-28
Number of pages	6
Journal	Analog Integrated Circuits and Signal Processing
Volume	81
Issue number	1
DOIs	https://doi.org/10.1007/s10470-014-0319-8
State	Published - 23 Sep 2014

Bibliographical note

Publisher Copyright:
© 2014, Springer Science+Business Media New York.

Keywords

Carried mobility reduction
Current mode
Short channel MOSFET
Squaring circuit

ASJC Scopus subject areas

Signal Processing
Hardware and Architecture
Surfaces, Coatings and Films

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10.1007/s10470-014-0319-8

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abstract = "This paper presents a new current-mode squaring circuit. The design is based on MOSFETs translinear principle in strong inversion. A new compensation technique to minimize the second order effects caused by carrier mobility reduction in short channel MOSFETs is proposed. Tanner T-spice simulation tool is used to confirm the functionality of the proposed design in 0.18 µm CMOS process technology. Simulation results indicate that the maximum linearity error is 1.2 \%; power consumption is 326 µW and bandwidth of 340 MHz.",

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AU - AL-Absi, Munir A.

AU - As-Sabban, Ibrahim A.

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N2 - This paper presents a new current-mode squaring circuit. The design is based on MOSFETs translinear principle in strong inversion. A new compensation technique to minimize the second order effects caused by carrier mobility reduction in short channel MOSFETs is proposed. Tanner T-spice simulation tool is used to confirm the functionality of the proposed design in 0.18 µm CMOS process technology. Simulation results indicate that the maximum linearity error is 1.2 %; power consumption is 326 µW and bandwidth of 340 MHz.

AB - This paper presents a new current-mode squaring circuit. The design is based on MOSFETs translinear principle in strong inversion. A new compensation technique to minimize the second order effects caused by carrier mobility reduction in short channel MOSFETs is proposed. Tanner T-spice simulation tool is used to confirm the functionality of the proposed design in 0.18 µm CMOS process technology. Simulation results indicate that the maximum linearity error is 1.2 %; power consumption is 326 µW and bandwidth of 340 MHz.

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KW - Current mode

KW - Short channel MOSFET

KW - Squaring circuit

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A CMOS current-mode squaring circuit free of error resulting from carrier mobility reduction

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

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