7L-SCBI topology with minimal semiconductor device count

Bhimireddy Prathap Reddy; Marif Daula Siddique; Atif Iqbal; Saad Mekhilef; Syed Rahman; Pandav Kiran Maroti

doi:10.1049/iet-pel.2020.0313

7L-SCBI topology with minimal semiconductor device count

Bhimireddy Prathap Reddy
, Marif Daula Siddique
, Atif Iqbal^*
, Saad Mekhilef
, Syed Rahman
, Pandav Kiran Maroti

^*Corresponding author for this work

Department of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

22 Scopus citations

Abstract

In this work, a seven-level switched capacitor boost inverter (7L-SCBI) is proposed with minimal resource count. The proposed inverter requires only eight switches and two capacitors to generate a seven-level voltage. The proposed 7L-SCBI is capable of generating a multilevel voltage as well as boost the input DC-link voltage up to 1.5 times with a reduced blocking voltage of switches and capacitors. The comparison in terms of efficiency and device count with other switched capacitor topologies is presented in detail. The performance validation of the proposed 7L-SCBI is done with the help of a laboratory prototype.

Original language	English
Pages (from-to)	3065-3071
Number of pages	7
Journal	IET Power Electronics
Volume	13
Issue number	14
DOIs	https://doi.org/10.1049/iet-pel.2020.0313
State	Published - 4 Nov 2020

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© 2020 Institution of Engineering and Technology. All rights reserved.

ASJC Scopus subject areas

Electrical and Electronic Engineering

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title = "7L-SCBI topology with minimal semiconductor device count",

abstract = "In this work, a seven-level switched capacitor boost inverter (7L-SCBI) is proposed with minimal resource count. The proposed inverter requires only eight switches and two capacitors to generate a seven-level voltage. The proposed 7L-SCBI is capable of generating a multilevel voltage as well as boost the input DC-link voltage up to 1.5 times with a reduced blocking voltage of switches and capacitors. The comparison in terms of efficiency and device count with other switched capacitor topologies is presented in detail. The performance validation of the proposed 7L-SCBI is done with the help of a laboratory prototype.",

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doi = "10.1049/iet-pel.2020.0313",

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AU - Reddy, Bhimireddy Prathap

AU - Siddique, Marif Daula

AU - Iqbal, Atif

AU - Mekhilef, Saad

AU - Rahman, Syed

AU - Maroti, Pandav Kiran

PY - 2020/11/4

Y1 - 2020/11/4

N2 - In this work, a seven-level switched capacitor boost inverter (7L-SCBI) is proposed with minimal resource count. The proposed inverter requires only eight switches and two capacitors to generate a seven-level voltage. The proposed 7L-SCBI is capable of generating a multilevel voltage as well as boost the input DC-link voltage up to 1.5 times with a reduced blocking voltage of switches and capacitors. The comparison in terms of efficiency and device count with other switched capacitor topologies is presented in detail. The performance validation of the proposed 7L-SCBI is done with the help of a laboratory prototype.

AB - In this work, a seven-level switched capacitor boost inverter (7L-SCBI) is proposed with minimal resource count. The proposed inverter requires only eight switches and two capacitors to generate a seven-level voltage. The proposed 7L-SCBI is capable of generating a multilevel voltage as well as boost the input DC-link voltage up to 1.5 times with a reduced blocking voltage of switches and capacitors. The comparison in terms of efficiency and device count with other switched capacitor topologies is presented in detail. The performance validation of the proposed 7L-SCBI is done with the help of a laboratory prototype.

UR - https://www.scopus.com/pages/publications/85093969208

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DO - 10.1049/iet-pel.2020.0313

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SP - 3065

EP - 3071

JO - IET Power Electronics

JF - IET Power Electronics

IS - 14

ER -

7L-SCBI topology with minimal semiconductor device count

Abstract

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